Loading drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c +14 −1 Original line number Diff line number Diff line Loading @@ -23,6 +23,8 @@ #define LANE_MASK_2PH 0x1F #define LANE_MASK_3PH 0x7 #define SKEW_CAL_MASK 0x2 static int csiphy_dump; module_param(csiphy_dump, int, 0644); Loading Loading @@ -242,7 +244,8 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev, csiphy_dev->csiphy_info.data_rate = cam_cmd_csiphy_info->data_rate; } csiphy_dev->csiphy_info.mipi_flags = cam_cmd_csiphy_info->mipi_flags; if (cam_cmd_csiphy_info->secure_mode == 1) cam_csiphy_update_secure_info(csiphy_dev, Loading Loading @@ -381,6 +384,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) uint8_t lane_cnt, lane_pos = 0; uint16_t settle_cnt = 0; uint64_t intermediate_var; uint8_t skew_cal_enable = 0; void __iomem *csiphybase; struct csiphy_reg_t *csiphy_common_reg = NULL; struct csiphy_reg_t (*reg_array)[MAX_SETTINGS_PER_LANE]; Loading Loading @@ -415,6 +419,9 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) } mask <<= 1; } skew_cal_enable = csiphy_dev->csiphy_info.mipi_flags & SKEW_CAL_MASK; } else { if (csiphy_dev->csiphy_info.combo_mode == 1) { if (csiphy_dev->ctrl_reg->csiphy_2ph_3ph_mode_reg) Loading Loading @@ -522,6 +529,12 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) csiphybase + reg_array[lane_pos][i].reg_addr); break; case CSIPHY_SKEW_CAL: if (skew_cal_enable) cam_io_w_mb(reg_array[lane_pos][i].reg_data, csiphybase + reg_array[lane_pos][i].reg_addr); break; default: CAM_DBG(CAM_CSIPHY, "Do Nothing"); break; Loading drivers/cam_sensor_module/cam_csiphy/cam_csiphy_dev.h +4 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_CSIPHY_DEV_H_ Loading Loading @@ -53,6 +53,7 @@ #define CSIPHY_DNP_PARAMS 4 #define CSIPHY_2PH_REGS 5 #define CSIPHY_3PH_REGS 6 #define CSIPHY_SKEW_CAL 7 #define CSIPHY_MAX_INSTANCES 2 Loading Loading @@ -219,7 +220,7 @@ struct csiphy_ctrl_t { * @data_rate : Data rate in mbps * @data_rate_combo_sensor: data rate of combo sensor * in the the same phy * * @mipi_flags : Mipi flags */ struct cam_csiphy_param { uint16_t lane_mask; Loading @@ -232,6 +233,7 @@ struct cam_csiphy_param { uint64_t settle_time_combo_sensor; uint64_t data_rate; uint64_t data_rate_combo_sensor; uint32_t mipi_flags; }; /** Loading drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_2_hwreg.h +3 −3 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0064, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading Loading @@ -89,7 +89,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0208, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0264, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading @@ -109,7 +109,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0464, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h +18 −18 Original line number Diff line number Diff line Loading @@ -73,8 +73,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading Loading @@ -123,8 +123,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0208, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -148,8 +148,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0408, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -173,8 +173,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0608, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0660, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -201,8 +201,8 @@ struct csiphy_reg_t {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, Loading @@ -228,8 +228,8 @@ struct csiphy_reg_t {0x070c, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x075C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0760, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x075C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0760, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, { Loading @@ -252,8 +252,8 @@ struct csiphy_reg_t {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_SKEW_CAL}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -277,8 +277,8 @@ struct csiphy_reg_t {0x0408, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -303,8 +303,8 @@ struct csiphy_reg_t {0x060c, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0660, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, }; Loading include/uapi/media/cam_sensor.h +5 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ /* * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. */ #ifndef __UAPI_CAM_SENSOR_H__ Loading Loading @@ -334,7 +334,8 @@ struct cam_cmd_unconditional_wait { * @3phase : Details whether 3Phase / 2Phase operation * @settle_time : Settling time in ms * @data_rate : Data rate * * @mipi_flags : Mipi flags mask * @reserved */ struct cam_csiphy_info { uint16_t lane_mask; Loading @@ -345,6 +346,8 @@ struct cam_csiphy_info { uint8_t secure_mode; uint64_t settle_time; uint64_t data_rate; uint32_t mipi_flags; uint32_t reserved; } __attribute__((packed)); /** Loading Loading
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_core.c +14 −1 Original line number Diff line number Diff line Loading @@ -23,6 +23,8 @@ #define LANE_MASK_2PH 0x1F #define LANE_MASK_3PH 0x7 #define SKEW_CAL_MASK 0x2 static int csiphy_dump; module_param(csiphy_dump, int, 0644); Loading Loading @@ -242,7 +244,8 @@ int32_t cam_cmd_buf_parser(struct csiphy_device *csiphy_dev, csiphy_dev->csiphy_info.data_rate = cam_cmd_csiphy_info->data_rate; } csiphy_dev->csiphy_info.mipi_flags = cam_cmd_csiphy_info->mipi_flags; if (cam_cmd_csiphy_info->secure_mode == 1) cam_csiphy_update_secure_info(csiphy_dev, Loading Loading @@ -381,6 +384,7 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) uint8_t lane_cnt, lane_pos = 0; uint16_t settle_cnt = 0; uint64_t intermediate_var; uint8_t skew_cal_enable = 0; void __iomem *csiphybase; struct csiphy_reg_t *csiphy_common_reg = NULL; struct csiphy_reg_t (*reg_array)[MAX_SETTINGS_PER_LANE]; Loading Loading @@ -415,6 +419,9 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) } mask <<= 1; } skew_cal_enable = csiphy_dev->csiphy_info.mipi_flags & SKEW_CAL_MASK; } else { if (csiphy_dev->csiphy_info.combo_mode == 1) { if (csiphy_dev->ctrl_reg->csiphy_2ph_3ph_mode_reg) Loading Loading @@ -522,6 +529,12 @@ int32_t cam_csiphy_config_dev(struct csiphy_device *csiphy_dev) csiphybase + reg_array[lane_pos][i].reg_addr); break; case CSIPHY_SKEW_CAL: if (skew_cal_enable) cam_io_w_mb(reg_array[lane_pos][i].reg_data, csiphybase + reg_array[lane_pos][i].reg_addr); break; default: CAM_DBG(CAM_CSIPHY, "Do Nothing"); break; Loading
drivers/cam_sensor_module/cam_csiphy/cam_csiphy_dev.h +4 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved. */ #ifndef _CAM_CSIPHY_DEV_H_ Loading Loading @@ -53,6 +53,7 @@ #define CSIPHY_DNP_PARAMS 4 #define CSIPHY_2PH_REGS 5 #define CSIPHY_3PH_REGS 6 #define CSIPHY_SKEW_CAL 7 #define CSIPHY_MAX_INSTANCES 2 Loading Loading @@ -219,7 +220,7 @@ struct csiphy_ctrl_t { * @data_rate : Data rate in mbps * @data_rate_combo_sensor: data rate of combo sensor * in the the same phy * * @mipi_flags : Mipi flags */ struct cam_csiphy_param { uint16_t lane_mask; Loading @@ -232,6 +233,7 @@ struct cam_csiphy_param { uint64_t settle_time_combo_sensor; uint64_t data_rate; uint64_t data_rate_combo_sensor; uint32_t mipi_flags; }; /** Loading
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_2_hwreg.h +3 −3 Original line number Diff line number Diff line Loading @@ -49,7 +49,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0064, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading Loading @@ -89,7 +89,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0208, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0264, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading @@ -109,7 +109,7 @@ csiphy_2ph_v1_2_2_combo_mode_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0408, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0464, 0x7F, 0x00, CSIPHY_DNP_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, Loading
drivers/cam_sensor_module/cam_csiphy/include/cam_csiphy_1_2_3_hwreg.h +18 −18 Original line number Diff line number Diff line Loading @@ -73,8 +73,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading Loading @@ -123,8 +123,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0208, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -148,8 +148,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0408, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -173,8 +173,8 @@ csiphy_reg_t csiphy_2ph_v1_2_3_reg[MAX_LANES][MAX_SETTINGS_PER_LANE] = { {0x0608, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0660, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x02, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -201,8 +201,8 @@ struct csiphy_reg_t {0x0008, 0x10, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0010, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0038, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0060, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x005C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0060, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, Loading @@ -228,8 +228,8 @@ struct csiphy_reg_t {0x070c, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0710, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0738, 0x1F, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x075C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0760, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x075C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0760, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, { Loading @@ -252,8 +252,8 @@ struct csiphy_reg_t {0x0210, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0238, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x025C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0260, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_SKEW_CAL}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -277,8 +277,8 @@ struct csiphy_reg_t {0x0408, 0x04, 0x00, CSIPHY_SETTLE_CNT_LOWER_BYTE}, {0x0410, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0438, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0460, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x045C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0460, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0000, 0x00, 0x00, CSIPHY_DNP_PARAMS}, }, Loading @@ -303,8 +303,8 @@ struct csiphy_reg_t {0x060c, 0xFF, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0610, 0x52, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0638, 0xFE, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x0660, 0x0D, 0x00, CSIPHY_DEFAULT_PARAMS}, {0x065C, 0xC0, 0x00, CSIPHY_SKEW_CAL}, {0x0660, 0x0D, 0x00, CSIPHY_SKEW_CAL}, {0x0800, 0x00, 0x00, CSIPHY_DEFAULT_PARAMS}, }, }; Loading
include/uapi/media/cam_sensor.h +5 −2 Original line number Diff line number Diff line /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ /* * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved. */ #ifndef __UAPI_CAM_SENSOR_H__ Loading Loading @@ -334,7 +334,8 @@ struct cam_cmd_unconditional_wait { * @3phase : Details whether 3Phase / 2Phase operation * @settle_time : Settling time in ms * @data_rate : Data rate * * @mipi_flags : Mipi flags mask * @reserved */ struct cam_csiphy_info { uint16_t lane_mask; Loading @@ -345,6 +346,8 @@ struct cam_csiphy_info { uint8_t secure_mode; uint64_t settle_time; uint64_t data_rate; uint32_t mipi_flags; uint32_t reserved; } __attribute__((packed)); /** Loading