Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f3c0891c authored by Borislav Petkov's avatar Borislav Petkov
Browse files

EDAC, mce_amd: Get rid of most struct cpuinfo_x86 uses 



struct mce.cpuid contains CPUID(1).EAX which contains family, model and
stepping and thus has enough information for our purposes. Thus get rid
of some external dependencies which are not really needed.

No functionality change.

Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
parent 4ab1784b

drivers/edac/mce_amd.c

+12 −10
Original line number Original line Diff line number Diff line 
#include <linux/module.h>

#include <linux/module.h>

#include <linux/slab.h>

#include <linux/slab.h>





#include <asm/cpu.h>



#include "mce_amd.h"

#include "mce_amd.h"





static struct amd_decoder_ops *fam_ops;

static struct amd_decoder_ops *fam_ops;
@@ -744,7 +746,7 @@ static void decode_mc3_mce(struct mce *m) 




static void decode_mc4_mce(struct mce *m)

static void decode_mc4_mce(struct mce *m)

{

{

	struct cpuinfo_x86 *c = &boot_cpu_data;

	unsigned int fam = x86_family(m->cpuid);

	int node_id = amd_get_nb_id(m->extcpu);

	int node_id = amd_get_nb_id(m->extcpu);

	u16 ec = EC(m->status);

	u16 ec = EC(m->status);

	u8 xec = XEC(m->status, 0x1f);

	u8 xec = XEC(m->status, 0x1f);
@@ -758,7 +760,7 @@ static void decode_mc4_mce(struct mce *m) 
		/* special handling for DRAM ECCs */

		/* special handling for DRAM ECCs */

		if (xec == 0x0 || xec == 0x8) {

		if (xec == 0x0 || xec == 0x8) {

			/* no ECCs on F11h */

			/* no ECCs on F11h */

			if (c->x86 == 0x11)

			if (fam == 0x11)

				goto wrong_mc4_mce;

				goto wrong_mc4_mce;





			pr_cont("%s.\n", mc4_mce_desc[xec]);

			pr_cont("%s.\n", mc4_mce_desc[xec]);
@@ -779,7 +781,7 @@ static void decode_mc4_mce(struct mce *m) 
		return;

		return;





	case 0x19:

	case 0x19:

		if (boot_cpu_data.x86 == 0x15 || boot_cpu_data.x86 == 0x16)

		if (fam == 0x15 || fam == 0x16)

			pr_cont("Compute Unit Data Error.\n");

			pr_cont("Compute Unit Data Error.\n");

		else

		else

			goto wrong_mc4_mce;

			goto wrong_mc4_mce;
@@ -802,11 +804,11 @@ static void decode_mc4_mce(struct mce *m) 




static void decode_mc5_mce(struct mce *m)

static void decode_mc5_mce(struct mce *m)

{

{

	struct cpuinfo_x86 *c = &boot_cpu_data;

	unsigned int fam = x86_family(m->cpuid);

	u16 ec = EC(m->status);

	u16 ec = EC(m->status);

	u8 xec = XEC(m->status, xec_mask);

	u8 xec = XEC(m->status, xec_mask);





	if (c->x86 == 0xf || c->x86 == 0x11)

	if (fam == 0xf || fam == 0x11)

		goto wrong_mc5_mce;

		goto wrong_mc5_mce;





	pr_emerg(HW_ERR "MC5 Error: ");

	pr_emerg(HW_ERR "MC5 Error: ");
@@ -859,7 +861,7 @@ static void decode_smca_error(struct mce *m) 
	if (m->bank >= ARRAY_SIZE(smca_banks))

	if (m->bank >= ARRAY_SIZE(smca_banks))

		return;

		return;





	if (boot_cpu_data.x86 >= 0x17 && m->bank == 4)

	if (x86_family(m->cpuid) >= 0x17 && m->bank == 4)

		pr_emerg(HW_ERR "Bank 4 is reserved on Fam17h.\n");

		pr_emerg(HW_ERR "Bank 4 is reserved on Fam17h.\n");





	hwid = smca_banks[m->bank].hwid;

	hwid = smca_banks[m->bank].hwid;
@@ -942,7 +944,7 @@ static int 
amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)

amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)

{

{

	struct mce *m = (struct mce *)data;

	struct mce *m = (struct mce *)data;

	struct cpuinfo_x86 *c = &cpu_data(m->extcpu);

	unsigned int fam = x86_family(m->cpuid);

	int ecc;

	int ecc;





	if (amd_filter_mce(m))

	if (amd_filter_mce(m))
@@ -952,7 +954,7 @@ amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) 




	pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",

	pr_emerg(HW_ERR "CPU:%d (%x:%x:%x) MC%d_STATUS[%s|%s|%s|%s|%s",

		m->extcpu,

		m->extcpu,

		c->x86, c->x86_model, c->x86_mask,

		fam, x86_model(m->cpuid), x86_stepping(m->cpuid),

		m->bank,

		m->bank,

		((m->status & MCI_STATUS_OVER)	? "Over"  : "-"),

		((m->status & MCI_STATUS_OVER)	? "Over"  : "-"),

		((m->status & MCI_STATUS_UC)	? "UE"	  :

		((m->status & MCI_STATUS_UC)	? "UE"	  :
@@ -961,11 +963,11 @@ amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data) 
		((m->status & MCI_STATUS_PCC)	? "PCC"	  : "-"),

		((m->status & MCI_STATUS_PCC)	? "PCC"	  : "-"),

		((m->status & MCI_STATUS_ADDRV)	? "AddrV" : "-"));

		((m->status & MCI_STATUS_ADDRV)	? "AddrV" : "-"));





	if (c->x86 >= 0x15) {

	if (fam >= 0x15) {

		pr_cont("|%s", (m->status & MCI_STATUS_DEFERRED ? "Deferred" : "-"));

		pr_cont("|%s", (m->status & MCI_STATUS_DEFERRED ? "Deferred" : "-"));





		/* F15h, bank4, bit 43 is part of McaStatSubCache. */

		/* F15h, bank4, bit 43 is part of McaStatSubCache. */

		if (c->x86 != 0x15 || m->bank != 4)

		if (fam != 0x15 || m->bank != 4)

			pr_cont("|%s", (m->status & MCI_STATUS_POISON ? "Poison" : "-"));

			pr_cont("|%s", (m->status & MCI_STATUS_POISON ? "Poison" : "-"));

	}

	}