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Commit f33bcf03 authored Jul 01, 2016 by Catalin Marinas

arm64: Factor out TTBR0_EL1 post-update workaround into a specific asm macro

This patch takes the errata workaround code out of cpu_do_switch_mm into
a dedicated post_ttbr0_update_workaround macro which will be reused in a
subsequent patch.

Cc: Will Deacon <will.deacon@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Kees Cook <keescook@chromium.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

parent bd38967d

arch/arm64/include/asm/assembler.h

+13 −0

Original line number	Original line	Diff line number	Diff line
	@@ -406,4 +406,17 @@ alternative_endif
	movk \reg, :abs_g0_nc:\val		movk \reg, :abs_g0_nc:\val
	.endm		.endm

			/*
			* Errata workaround post TTBR0_EL1 update.
			*/
			.macro post_ttbr0_update_workaround
			#ifdef CONFIG_CAVIUM_ERRATUM_27456
			alternative_if ARM64_WORKAROUND_CAVIUM_27456
			ic iallu
			dsb nsh
			isb
			alternative_else_nop_endif
			#endif
			.endm

	#endif /* __ASM_ASSEMBLER_H */		#endif /* __ASM_ASSEMBLER_H */

arch/arm64/mm/proc.S

+1 −5

Original line number	Original line	Diff line number	Diff line
	@@ -142,11 +142,7 @@ ENTRY(cpu_do_switch_mm)
	bfi x0, x1, #48, #16 // set the ASID		bfi x0, x1, #48, #16 // set the ASID
	msr ttbr0_el1, x0 // set TTBR0		msr ttbr0_el1, x0 // set TTBR0
	isb		isb
	alternative_if ARM64_WORKAROUND_CAVIUM_27456		post_ttbr0_update_workaround
	ic iallu
	dsb nsh
	isb
	alternative_else_nop_endif
	ret		ret
	ENDPROC(cpu_do_switch_mm)		ENDPROC(cpu_do_switch_mm)