Loading qcom/lagoon.dtsi +14 −0 Original line number Original line Diff line number Diff line Loading @@ -2311,6 +2311,20 @@ qcom,smem-state-names = "qcom,force-stop"; qcom,smem-state-names = "qcom,force-stop"; }; }; eud: qcom,msm-eud@88e0000 { compatible = "qcom,msm-eud"; interrupt-names = "eud_irq"; interrupt-parent = <&pdc>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x088e0000 0x2000>, <0x088e2000 0x1000>; reg-names = "eud_base", "eud_mode_mgr2"; qcom,secure-eud-en; qcom,eud-clock-vote-req; clock-names = "eud_ahb2phy_clk"; status = "ok"; }; llcc_pmu: llcc-pmu@90cc000 { llcc_pmu: llcc-pmu@90cc000 { compatible = "qcom,llcc-pmu-ver1"; compatible = "qcom,llcc-pmu-ver1"; reg = <0x090cc000 0x300>; reg = <0x090cc000 0x300>; Loading Loading
qcom/lagoon.dtsi +14 −0 Original line number Original line Diff line number Diff line Loading @@ -2311,6 +2311,20 @@ qcom,smem-state-names = "qcom,force-stop"; qcom,smem-state-names = "qcom,force-stop"; }; }; eud: qcom,msm-eud@88e0000 { compatible = "qcom,msm-eud"; interrupt-names = "eud_irq"; interrupt-parent = <&pdc>; interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; reg = <0x088e0000 0x2000>, <0x088e2000 0x1000>; reg-names = "eud_base", "eud_mode_mgr2"; qcom,secure-eud-en; qcom,eud-clock-vote-req; clock-names = "eud_ahb2phy_clk"; status = "ok"; }; llcc_pmu: llcc-pmu@90cc000 { llcc_pmu: llcc-pmu@90cc000 { compatible = "qcom,llcc-pmu-ver1"; compatible = "qcom,llcc-pmu-ver1"; reg = <0x090cc000 0x300>; reg = <0x090cc000 0x300>; Loading