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Commit f2302023 authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
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MIPS: Sanitise coherentio semantics 



The coherentio variable has previously been used as a boolean value,
indicating whether the user specified that coherent I/O should be
enabled or disabled. It failed to take into account the case where the
user does not specify any preference, in which case it makes sense that
we should default to coherent I/O if the hardware supports it
(hw_coherentio is non-zero).

Introduce an enum to clarify the 3 different values of coherentio & use
it throughout the code, modifying plat_device_is_coherent() &
r4k_cache_init() to take into account the default case.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/14347/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 87dd9a4d

arch/mips/alchemy/common/setup.c

+3 −3
Original line number Diff line number Diff line
@@ -48,17 +48,17 @@ void __init plat_mem_setup(void) 
		clear_c0_config(1 << 19); /* Clear Config[OD] */



	hw_coherentio = 0;

	coherentio = 1;

	coherentio = IO_COHERENCE_ENABLED;

	switch (alchemy_get_cputype()) {

	case ALCHEMY_CPU_AU1000:

	case ALCHEMY_CPU_AU1500:

	case ALCHEMY_CPU_AU1100:

		coherentio = 0;

		coherentio = IO_COHERENCE_DISABLED;

		break;

	case ALCHEMY_CPU_AU1200:

		/* Au1200 AB USB does not support coherent memory */

		if (0 == (read_c0_prid() & PRID_REV_MASK))

			coherentio = 0;

			coherentio = IO_COHERENCE_DISABLED;

		break;

	}

arch/mips/include/asm/dma-coherence.h

+9 −3
Original line number Diff line number Diff line
@@ -9,14 +9,20 @@ 
#ifndef __ASM_DMA_COHERENCE_H

#define __ASM_DMA_COHERENCE_H



enum coherent_io_user_state {

	IO_COHERENCE_DEFAULT,

	IO_COHERENCE_ENABLED,

	IO_COHERENCE_DISABLED,

};



#ifdef CONFIG_DMA_MAYBE_COHERENT

extern int coherentio;

extern enum coherent_io_user_state coherentio;

extern int hw_coherentio;

#else

#ifdef CONFIG_DMA_COHERENT

#define coherentio	1

#define coherentio	IO_COHERENCE_ENABLED

#else

#define coherentio	0

#define coherentio	IO_COHERENCE_DISABLED

#endif

#define hw_coherentio	0

#endif /* CONFIG_DMA_MAYBE_COHERENT */

arch/mips/include/asm/mach-generic/dma-coherence.h

+9 −1
Original line number Diff line number Diff line
@@ -49,7 +49,15 @@ static inline int plat_dma_supported(struct device *dev, u64 mask) 


static inline int plat_device_is_coherent(struct device *dev)

{

	return coherentio;

	switch (coherentio) {

	default:

	case IO_COHERENCE_DEFAULT:

		return hw_coherentio;

	case IO_COHERENCE_ENABLED:

		return 1;

	case IO_COHERENCE_DISABLED:

		return 0;

	}

}



#ifndef plat_post_dma_flush

arch/mips/mm/c-r4k.c

+2 −1
Original line number Diff line number Diff line
@@ -1935,7 +1935,8 @@ void r4k_cache_init(void) 
	__local_flush_icache_user_range	= local_r4k_flush_icache_user_range;



#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_DMA_MAYBE_COHERENT)

	if (coherentio) {

	if ((coherentio == IO_COHERENCE_ENABLED) ||

	    ((coherentio == IO_COHERENCE_DEFAULT) && hw_coherentio)) {

		_dma_cache_wback_inv	= (void *)cache_noop;

		_dma_cache_wback	= (void *)cache_noop;

		_dma_cache_inv		= (void *)cache_noop;

arch/mips/mm/dma-default.c

+4 −3
Original line number Diff line number Diff line
@@ -25,13 +25,14 @@ 
#include <dma-coherence.h>



#ifdef CONFIG_DMA_MAYBE_COHERENT

int coherentio = 0;	/* User defined DMA coherency from command line. */

/* User defined DMA coherency from command line. */

enum coherent_io_user_state coherentio = IO_COHERENCE_DEFAULT;

EXPORT_SYMBOL_GPL(coherentio);

int hw_coherentio = 0;	/* Actual hardware supported DMA coherency setting. */



static int __init setcoherentio(char *str)

{

	coherentio = 1;

	coherentio = IO_COHERENCE_ENABLED;

	pr_info("Hardware DMA cache coherency (command line)\n");

	return 0;

}
@@ -39,7 +40,7 @@ early_param("coherentio", setcoherentio); 


static int __init setnocoherentio(char *str)

{

	coherentio = 0;

	coherentio = IO_COHERENCE_DISABLED;

	pr_info("Software DMA cache coherency (command line)\n");

	return 0;

}