Loading drivers/net/wireless/ath9k/core.h +130 −145 Original line number Original line Diff line number Diff line Loading @@ -140,8 +140,7 @@ struct ath_config { u16 txpowlimit; u16 txpowlimit; u16 txpowlimit_override; u16 txpowlimit_override; u8 cabqReadytime; /* Cabq Readytime % */ u8 cabqReadytime; /* Cabq Readytime % */ u8 swBeaconProcess; /* Process received beacons u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */ in SW (vs HW) */ }; }; /***********************/ /***********************/ Loading Loading @@ -351,17 +350,17 @@ struct ath_recv_status { }; }; struct ath_rxbuf { struct ath_rxbuf { struct sk_buff *rx_wbuf; /* buffer */ struct sk_buff *rx_wbuf; unsigned long rx_time; /* system time when received */ unsigned long rx_time; /* system time when received */ struct ath_recv_status rx_status; /* cached rx status */ struct ath_recv_status rx_status; /* cached rx status */ }; }; /* Per-TID aggregate receiver state for a node */ /* Per-TID aggregate receiver state for a node */ struct ath_arx_tid { struct ath_arx_tid { struct ath_node *an; /* parent ath node */ struct ath_node *an; struct ath_rxbuf *rxbuf; /* re-ordering buffer */ struct ath_rxbuf *rxbuf; /* re-ordering buffer */ struct timer_list timer; struct timer_list timer; spinlock_t tidlock; /* lock to protect this TID structure */ spinlock_t tidlock; int baw_head; /* seq_next at head */ int baw_head; /* seq_next at head */ int baw_tail; /* tail of block-ack window */ int baw_tail; /* tail of block-ack window */ int seq_reset; /* need to reset start sequence */ int seq_reset; /* need to reset start sequence */ Loading Loading @@ -447,23 +446,25 @@ struct ath_txq { u32 axq_qnum; /* hardware q number */ u32 axq_qnum; /* hardware q number */ u32 *axq_link; /* link ptr in last TX desc */ u32 *axq_link; /* link ptr in last TX desc */ struct list_head axq_q; /* transmit queue */ struct list_head axq_q; /* transmit queue */ spinlock_t axq_lock; /* lock on q and link */ spinlock_t axq_lock; unsigned long axq_lockflags; /* intr state when must cli */ unsigned long axq_lockflags; /* intr state when must cli */ u32 axq_depth; /* queue depth */ u32 axq_depth; /* queue depth */ u8 axq_aggr_depth; /* aggregates queued */ u8 axq_aggr_depth; /* aggregates queued */ u32 axq_totalqueued; /* total ever queued */ u32 axq_totalqueued; /* total ever queued */ u32 axq_intrcnt; /* count to determine if descriptor should generate /* count to determine if descriptor should generate int on this txq. */ int on this txq. */ u32 axq_intrcnt; bool stopped; /* Is mac80211 queue stopped ? */ bool stopped; /* Is mac80211 queue stopped ? */ /* State for patching up CTS when bursting */ struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ struct ath_desc *axq_lastdsWithCTS; /* first desc of the last descriptor that contains CTS */ /* first desc of the last descriptor that contains CTS */ struct ath_desc *axq_gatingds; /* final desc of the gating desc struct ath_desc *axq_lastdsWithCTS; * that determines whether lastdsWithCTS has * been DMA'ed or not */ /* final desc of the gating desc that determines whether lastdsWithCTS has been DMA'ed or not */ struct ath_desc *axq_gatingds; struct list_head axq_acq; struct list_head axq_acq; }; }; Loading @@ -471,20 +472,19 @@ struct ath_txq { struct ath_atx_tid { struct ath_atx_tid { struct list_head list; /* round-robin tid entry */ struct list_head list; /* round-robin tid entry */ struct list_head buf_q; /* pending buffers */ struct list_head buf_q; /* pending buffers */ struct ath_node *an; /* parent node structure */ struct ath_node *an; struct ath_atx_ac *ac; /* parent access category */ struct ath_atx_ac *ac; struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */ struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */ u16 seq_start; /* starting seq of BA window */ u16 seq_start; u16 seq_next; /* next seq to be used */ u16 seq_next; u16 baw_size; /* BA window size */ u16 baw_size; int tidno; /* TID number */ int tidno; int baw_head; /* first un-acked tx buffer */ int baw_head; /* first un-acked tx buffer */ int baw_tail; /* next unused tx buffer slot */ int baw_tail; /* next unused tx buffer slot */ int sched; /* TID is scheduled */ int sched; int paused; /* TID is paused */ int paused; int cleanup_inprogress; /* aggr of this TID is int cleanup_inprogress; being teared down */ u32 addba_exchangecomplete:1; u32 addba_exchangecomplete:1; /* ADDBA state */ int32_t addba_exchangeinprogress; int32_t addba_exchangeinprogress; int addba_exchangeattempts; int addba_exchangeattempts; }; }; Loading @@ -506,26 +506,24 @@ struct ath_atx { /* per-frame tx control block */ /* per-frame tx control block */ struct ath_tx_control { struct ath_tx_control { struct ath_node *an; /* destination to sent to */ struct ath_node *an; int if_id; /* only valid for cab traffic */ int if_id; int qnum; /* h/w queue number */ int qnum; u32 ht:1; /* if it can be transmitted using HT */ u32 ht:1; u32 ps:1; /* if one or more stations are in PS mode */ u32 ps:1; u32 use_minrate:1; /* if this frame should transmitted using u32 use_minrate:1; minimum rate */ enum ath9k_pkt_type atype; enum ath9k_pkt_type atype; /* Atheros packet type */ enum ath9k_key_type keytype; enum ath9k_key_type keytype; /* key type */ u32 flags; u32 flags; /* HAL flags */ u16 seqno; u16 seqno; /* sequence number */ u16 tidno; u16 tidno; /* tid number */ u16 txpower; u16 txpower; /* transmit power */ u16 frmlen; u16 frmlen; /* frame length */ u32 keyix; u32 keyix; /* key index */ int min_rate; int min_rate; /* minimum rate */ int mcast_rate; int mcast_rate; /* multicast rate */ u16 nextfraglen; u16 nextfraglen; /* next fragment length */ struct ath_softc *dev; /* below is set only by ath_dev */ struct ath_softc *dev; /* device handle */ dma_addr_t dmacontext; dma_addr_t dmacontext; }; }; Loading Loading @@ -654,10 +652,10 @@ struct ath_node_aggr { /* driver-specific node state */ /* driver-specific node state */ struct ath_node { struct ath_node { struct list_head list; struct list_head list; struct ath_softc *an_sc; /* back pointer */ struct ath_softc *an_sc; atomic_t an_refcnt; atomic_t an_refcnt; struct ath_chainmask_sel an_chainmask_sel; struct ath_chainmask_sel an_chainmask_sel; struct ath_node_aggr an_aggr; /* A-MPDU aggregation state */ struct ath_node_aggr an_aggr; u8 an_smmode; /* SM Power save mode */ u8 an_smmode; /* SM Power save mode */ u8 an_flags; u8 an_flags; u8 an_addr[ETH_ALEN]; u8 an_addr[ETH_ALEN]; Loading Loading @@ -754,15 +752,6 @@ int ath_update_beacon(struct ath_softc *sc, /* VAPs */ /* VAPs */ /********/ /********/ #define ATH_IF_HW_OFF 0x0001 /* hardware state needs to turn off */ #define ATH_IF_HW_ON 0x0002 /* hardware state needs to turn on */ /* STA only: the associated AP is HT capable */ #define ATH_IF_HT 0x0004 /* AP/IBSS only: current BSS has privacy on */ #define ATH_IF_PRIVACY 0x0008 #define ATH_IF_BEACON_ENABLE 0x0010 /* AP/IBSS only: enable beacon */ #define ATH_IF_BEACON_SYNC 0x0020 /* IBSS only: need to sync beacon */ /* /* * Define the scheme that we select MAC address for multiple * Define the scheme that we select MAC address for multiple * BSS on the same radio. The very first VAP will just use the MAC * BSS on the same radio. The very first VAP will just use the MAC Loading @@ -782,18 +771,14 @@ struct ath_vap_config { /* driver-specific vap state */ /* driver-specific vap state */ struct ath_vap { struct ath_vap { struct ieee80211_vif *av_if_data; /* interface(vap) struct ieee80211_vif *av_if_data; instance from 802.11 protocal layer */ enum ath9k_opmode av_opmode; /* VAP operational mode */ enum ath9k_opmode av_opmode; /* VAP operational mode */ struct ath_buf *av_bcbuf; /* beacon buffer */ struct ath_buf *av_bcbuf; /* beacon buffer */ struct ath_beacon_offset av_boff; /* dynamic update state */ struct ath_beacon_offset av_boff; /* dynamic update state */ struct ath_tx_control av_btxctl; /* tx control information struct ath_tx_control av_btxctl; /* txctl information for beacon */ for beacon */ int av_bslot; /* beacon slot index */ int av_bslot; /* beacon slot index */ struct ath_txq av_mcastq; /* multicast struct ath_txq av_mcastq; /* multicast transmit queue */ transmit queue */ struct ath_vap_config av_config;/* vap configuration parameters*/ struct ath_vap_config av_config; /* vap configuration parameters from 802.11 protocol layer*/ struct ath_rate_node *rc_node; struct ath_rate_node *rc_node; }; }; Loading Loading
drivers/net/wireless/ath9k/core.h +130 −145 Original line number Original line Diff line number Diff line Loading @@ -140,8 +140,7 @@ struct ath_config { u16 txpowlimit; u16 txpowlimit; u16 txpowlimit_override; u16 txpowlimit_override; u8 cabqReadytime; /* Cabq Readytime % */ u8 cabqReadytime; /* Cabq Readytime % */ u8 swBeaconProcess; /* Process received beacons u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */ in SW (vs HW) */ }; }; /***********************/ /***********************/ Loading Loading @@ -351,17 +350,17 @@ struct ath_recv_status { }; }; struct ath_rxbuf { struct ath_rxbuf { struct sk_buff *rx_wbuf; /* buffer */ struct sk_buff *rx_wbuf; unsigned long rx_time; /* system time when received */ unsigned long rx_time; /* system time when received */ struct ath_recv_status rx_status; /* cached rx status */ struct ath_recv_status rx_status; /* cached rx status */ }; }; /* Per-TID aggregate receiver state for a node */ /* Per-TID aggregate receiver state for a node */ struct ath_arx_tid { struct ath_arx_tid { struct ath_node *an; /* parent ath node */ struct ath_node *an; struct ath_rxbuf *rxbuf; /* re-ordering buffer */ struct ath_rxbuf *rxbuf; /* re-ordering buffer */ struct timer_list timer; struct timer_list timer; spinlock_t tidlock; /* lock to protect this TID structure */ spinlock_t tidlock; int baw_head; /* seq_next at head */ int baw_head; /* seq_next at head */ int baw_tail; /* tail of block-ack window */ int baw_tail; /* tail of block-ack window */ int seq_reset; /* need to reset start sequence */ int seq_reset; /* need to reset start sequence */ Loading Loading @@ -447,23 +446,25 @@ struct ath_txq { u32 axq_qnum; /* hardware q number */ u32 axq_qnum; /* hardware q number */ u32 *axq_link; /* link ptr in last TX desc */ u32 *axq_link; /* link ptr in last TX desc */ struct list_head axq_q; /* transmit queue */ struct list_head axq_q; /* transmit queue */ spinlock_t axq_lock; /* lock on q and link */ spinlock_t axq_lock; unsigned long axq_lockflags; /* intr state when must cli */ unsigned long axq_lockflags; /* intr state when must cli */ u32 axq_depth; /* queue depth */ u32 axq_depth; /* queue depth */ u8 axq_aggr_depth; /* aggregates queued */ u8 axq_aggr_depth; /* aggregates queued */ u32 axq_totalqueued; /* total ever queued */ u32 axq_totalqueued; /* total ever queued */ u32 axq_intrcnt; /* count to determine if descriptor should generate /* count to determine if descriptor should generate int on this txq. */ int on this txq. */ u32 axq_intrcnt; bool stopped; /* Is mac80211 queue stopped ? */ bool stopped; /* Is mac80211 queue stopped ? */ /* State for patching up CTS when bursting */ struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/ struct ath_desc *axq_lastdsWithCTS; /* first desc of the last descriptor that contains CTS */ /* first desc of the last descriptor that contains CTS */ struct ath_desc *axq_gatingds; /* final desc of the gating desc struct ath_desc *axq_lastdsWithCTS; * that determines whether lastdsWithCTS has * been DMA'ed or not */ /* final desc of the gating desc that determines whether lastdsWithCTS has been DMA'ed or not */ struct ath_desc *axq_gatingds; struct list_head axq_acq; struct list_head axq_acq; }; }; Loading @@ -471,20 +472,19 @@ struct ath_txq { struct ath_atx_tid { struct ath_atx_tid { struct list_head list; /* round-robin tid entry */ struct list_head list; /* round-robin tid entry */ struct list_head buf_q; /* pending buffers */ struct list_head buf_q; /* pending buffers */ struct ath_node *an; /* parent node structure */ struct ath_node *an; struct ath_atx_ac *ac; /* parent access category */ struct ath_atx_ac *ac; struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */ struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */ u16 seq_start; /* starting seq of BA window */ u16 seq_start; u16 seq_next; /* next seq to be used */ u16 seq_next; u16 baw_size; /* BA window size */ u16 baw_size; int tidno; /* TID number */ int tidno; int baw_head; /* first un-acked tx buffer */ int baw_head; /* first un-acked tx buffer */ int baw_tail; /* next unused tx buffer slot */ int baw_tail; /* next unused tx buffer slot */ int sched; /* TID is scheduled */ int sched; int paused; /* TID is paused */ int paused; int cleanup_inprogress; /* aggr of this TID is int cleanup_inprogress; being teared down */ u32 addba_exchangecomplete:1; u32 addba_exchangecomplete:1; /* ADDBA state */ int32_t addba_exchangeinprogress; int32_t addba_exchangeinprogress; int addba_exchangeattempts; int addba_exchangeattempts; }; }; Loading @@ -506,26 +506,24 @@ struct ath_atx { /* per-frame tx control block */ /* per-frame tx control block */ struct ath_tx_control { struct ath_tx_control { struct ath_node *an; /* destination to sent to */ struct ath_node *an; int if_id; /* only valid for cab traffic */ int if_id; int qnum; /* h/w queue number */ int qnum; u32 ht:1; /* if it can be transmitted using HT */ u32 ht:1; u32 ps:1; /* if one or more stations are in PS mode */ u32 ps:1; u32 use_minrate:1; /* if this frame should transmitted using u32 use_minrate:1; minimum rate */ enum ath9k_pkt_type atype; enum ath9k_pkt_type atype; /* Atheros packet type */ enum ath9k_key_type keytype; enum ath9k_key_type keytype; /* key type */ u32 flags; u32 flags; /* HAL flags */ u16 seqno; u16 seqno; /* sequence number */ u16 tidno; u16 tidno; /* tid number */ u16 txpower; u16 txpower; /* transmit power */ u16 frmlen; u16 frmlen; /* frame length */ u32 keyix; u32 keyix; /* key index */ int min_rate; int min_rate; /* minimum rate */ int mcast_rate; int mcast_rate; /* multicast rate */ u16 nextfraglen; u16 nextfraglen; /* next fragment length */ struct ath_softc *dev; /* below is set only by ath_dev */ struct ath_softc *dev; /* device handle */ dma_addr_t dmacontext; dma_addr_t dmacontext; }; }; Loading Loading @@ -654,10 +652,10 @@ struct ath_node_aggr { /* driver-specific node state */ /* driver-specific node state */ struct ath_node { struct ath_node { struct list_head list; struct list_head list; struct ath_softc *an_sc; /* back pointer */ struct ath_softc *an_sc; atomic_t an_refcnt; atomic_t an_refcnt; struct ath_chainmask_sel an_chainmask_sel; struct ath_chainmask_sel an_chainmask_sel; struct ath_node_aggr an_aggr; /* A-MPDU aggregation state */ struct ath_node_aggr an_aggr; u8 an_smmode; /* SM Power save mode */ u8 an_smmode; /* SM Power save mode */ u8 an_flags; u8 an_flags; u8 an_addr[ETH_ALEN]; u8 an_addr[ETH_ALEN]; Loading Loading @@ -754,15 +752,6 @@ int ath_update_beacon(struct ath_softc *sc, /* VAPs */ /* VAPs */ /********/ /********/ #define ATH_IF_HW_OFF 0x0001 /* hardware state needs to turn off */ #define ATH_IF_HW_ON 0x0002 /* hardware state needs to turn on */ /* STA only: the associated AP is HT capable */ #define ATH_IF_HT 0x0004 /* AP/IBSS only: current BSS has privacy on */ #define ATH_IF_PRIVACY 0x0008 #define ATH_IF_BEACON_ENABLE 0x0010 /* AP/IBSS only: enable beacon */ #define ATH_IF_BEACON_SYNC 0x0020 /* IBSS only: need to sync beacon */ /* /* * Define the scheme that we select MAC address for multiple * Define the scheme that we select MAC address for multiple * BSS on the same radio. The very first VAP will just use the MAC * BSS on the same radio. The very first VAP will just use the MAC Loading @@ -782,18 +771,14 @@ struct ath_vap_config { /* driver-specific vap state */ /* driver-specific vap state */ struct ath_vap { struct ath_vap { struct ieee80211_vif *av_if_data; /* interface(vap) struct ieee80211_vif *av_if_data; instance from 802.11 protocal layer */ enum ath9k_opmode av_opmode; /* VAP operational mode */ enum ath9k_opmode av_opmode; /* VAP operational mode */ struct ath_buf *av_bcbuf; /* beacon buffer */ struct ath_buf *av_bcbuf; /* beacon buffer */ struct ath_beacon_offset av_boff; /* dynamic update state */ struct ath_beacon_offset av_boff; /* dynamic update state */ struct ath_tx_control av_btxctl; /* tx control information struct ath_tx_control av_btxctl; /* txctl information for beacon */ for beacon */ int av_bslot; /* beacon slot index */ int av_bslot; /* beacon slot index */ struct ath_txq av_mcastq; /* multicast struct ath_txq av_mcastq; /* multicast transmit queue */ transmit queue */ struct ath_vap_config av_config;/* vap configuration parameters*/ struct ath_vap_config av_config; /* vap configuration parameters from 802.11 protocol layer*/ struct ath_rate_node *rc_node; struct ath_rate_node *rc_node; }; }; Loading