Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f1e716d8 authored by Joonyoung Shim's avatar Joonyoung Shim Committed by Inki Dae
Browse files

drm/exynos: control blending of mixer graphic layer 0



The mixer graphic layer 0 isn't blended as default by commit
0377f4ed(drm/exynos: Don't blend mixer
layer 0). But it needs to be blended with graphic layer 0 if video layer
is enabled by vp because video layer is bottom.

Signed-off-by: default avatarJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: default avatarInki Dae <inki.dae@samsung.com>
parent 39b58a39
Loading
Loading
Loading
Loading
+5 −0
Original line number Diff line number Diff line
@@ -365,6 +365,11 @@ static void mixer_cfg_layer(struct mixer_context *ctx, int win, bool enable)
			vp_reg_writemask(res, VP_ENABLE, val, VP_ENABLE_ON);
			mixer_reg_writemask(res, MXR_CFG, val,
				MXR_CFG_VP_ENABLE);

			/* control blending of graphic layer 0 */
			mixer_reg_writemask(res, MXR_GRAPHIC_CFG(0), val,
					MXR_GRP_CFG_BLEND_PRE_MUL |
					MXR_GRP_CFG_PIXEL_BLEND_EN);
		}
		break;
	}