Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f0c0cb99 authored by Jon Mason's avatar Jon Mason Committed by Florian Fainelli
Browse files

arm64: dts: NS2: Add dma-coherent to relevant DT entries 



Cache related issues with DMA rings and performance issues related to
caching are being caused by not properly setting the "dma-coherent" flag
in the device tree entries.  Adding it here to correct the issue.

Signed-off-by: default avatarJon Mason <jon.mason@broadcom.com>
Fixes: fd5e5dd5 ("arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2")
Fixes: dddc3c9d ("arm64: dts: NS2: add AMAC ethernet support")
Fixes: e7924914 ("arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver")
Fixes: ac9aae00 ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2")
Fixes: efc87767 ("arm64: dts: Add SDHCI DT node for NS2")
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent c1ae3cfa

arch/arm64/boot/dts/broadcom/ns2.dtsi

+11 −0
Original line number Diff line number Diff line
@@ -114,6 +114,7 @@ 
	pcie0: pcie@20020000 {

		compatible = "brcm,iproc-pcie";

		reg = <0 0x20020000 0 0x1000>;

		dma-coherent;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;
@@ -144,6 +145,7 @@ 
	pcie4: pcie@50020000 {

		compatible = "brcm,iproc-pcie";

		reg = <0 0x50020000 0 0x1000>;

		dma-coherent;



		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0>;
@@ -174,6 +176,7 @@ 
	pcie8: pcie@60c00000 {

		compatible = "brcm,iproc-pcie-paxc";

		reg = <0 0x60c00000 0 0x1000>;

		dma-coherent;

		linux,pci-domain = <8>;



		bus-range = <0x0 0x1>;
@@ -203,6 +206,7 @@ 
			      <0x61030000 0x100>;

			reg-names = "amac_base", "idm_base", "nicpm_base";

			interrupts = <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;

			phy-handle = <&gphy0>;

			phy-mode = "rgmii";

			status = "disabled";
@@ -213,6 +217,7 @@ 
			reg = <0x612c0000 0x445>;  /* PDC FS0 regs */

			interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;

			#mbox-cells = <1>;

			dma-coherent;

			brcm,rx-status-len = <32>;

			brcm,use-bcm-hdr;

		};
@@ -222,6 +227,7 @@ 
			reg = <0x612e0000 0x445>;  /* PDC FS1 regs */

			interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;

			#mbox-cells = <1>;

			dma-coherent;

			brcm,rx-status-len = <32>;

			brcm,use-bcm-hdr;

		};
@@ -231,6 +237,7 @@ 
			reg = <0x61300000 0x445>;  /* PDC FS2 regs */

			interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;

			#mbox-cells = <1>;

			dma-coherent;

			brcm,rx-status-len = <32>;

			brcm,use-bcm-hdr;

		};
@@ -240,6 +247,7 @@ 
			reg = <0x61320000 0x445>;  /* PDC FS3 regs */

			interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;

			#mbox-cells = <1>;

			dma-coherent;

			brcm,rx-status-len = <32>;

			brcm,use-bcm-hdr;

		};
@@ -644,6 +652,7 @@ 
		sata: ahci@663f2000 {

			compatible = "brcm,iproc-ahci", "generic-ahci";

			reg = <0x663f2000 0x1000>;

			dma-coherent;

			reg-names = "ahci";

			interrupts = <GIC_SPI 438 IRQ_TYPE_LEVEL_HIGH>;

			#address-cells = <1>;
@@ -667,6 +676,7 @@ 
			compatible = "brcm,sdhci-iproc-cygnus";

			reg = <0x66420000 0x100>;

			interrupts = <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;

			bus-width = <8>;

			clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;

			status = "disabled";
@@ -676,6 +686,7 @@ 
			compatible = "brcm,sdhci-iproc-cygnus";

			reg = <0x66430000 0x100>;

			interrupts = <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>;

			dma-coherent;

			bus-width = <8>;

			clocks = <&genpll_sw BCM_NS2_GENPLL_SW_SDIO_CLK>;

			status = "disabled";