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Commit f074037a authored by Joonas Lahtinen's avatar Joonas Lahtinen
Browse files

Merge drm-next into drm-intel-next-queued 



To pull in the HDCP changes, especially wait_for changes to drm/i915
that Chris wants to build on top of.

Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parents 73c0fcac b8a89f53

drivers/dma-buf/reservation.c

+5 −3
Original line number Diff line number Diff line
@@ -471,13 +471,15 @@ long reservation_object_wait_timeout_rcu(struct reservation_object *obj, 
					 unsigned long timeout)

{

	struct dma_fence *fence;

	unsigned seq, shared_count, i = 0;

	unsigned seq, shared_count;

	long ret = timeout ? timeout : 1;

	int i;



retry:

	shared_count = 0;

	seq = read_seqcount_begin(&obj->seq);

	rcu_read_lock();

	i = -1;



	fence = rcu_dereference(obj->fence_excl);

	if (fence && !test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) {
@@ -493,14 +495,14 @@ long reservation_object_wait_timeout_rcu(struct reservation_object *obj, 
		fence = NULL;

	}



	if (!fence && wait_all) {

	if (wait_all) {

		struct reservation_object_list *fobj =

						rcu_dereference(obj->fence);



		if (fobj)

			shared_count = fobj->shared_count;



		for (i = 0; i < shared_count; ++i) {

		for (i = 0; !fence && i < shared_count; ++i) {

			struct dma_fence *lfence = rcu_dereference(fobj->shared[i]);



			if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,

drivers/gpu/drm/ast/ast_mode.c

+1 −0
Original line number Diff line number Diff line
@@ -644,6 +644,7 @@ static void ast_crtc_commit(struct drm_crtc *crtc) 
{

	struct ast_private *ast = crtc->dev->dev_private;

	ast_set_index_reg_mask(ast, AST_IO_SEQ_PORT, 0x1, 0xdf, 0);

	ast_crtc_load_lut(crtc);

}

drivers/gpu/drm/drm_auth.c

+6 −0
Original line number Diff line number Diff line
@@ -230,6 +230,12 @@ int drm_dropmaster_ioctl(struct drm_device *dev, void *data, 
	if (!dev->master)

		goto out_unlock;



	if (file_priv->master->lessor != NULL) {

		DRM_DEBUG_LEASE("Attempt to drop lessee %d as master\n", file_priv->master->lessee_id);

		ret = -EINVAL;

		goto out_unlock;

	}



	ret = 0;

	drm_drop_master(dev, file_priv);

out_unlock:

drivers/gpu/drm/i915/gvt/dmabuf.c

+0 −1
Original line number Diff line number Diff line
@@ -472,7 +472,6 @@ int intel_vgpu_get_dmabuf(struct intel_vgpu *vgpu, unsigned int dmabuf_id) 
		ret = PTR_ERR(dmabuf);

		goto out_free_gem;

	}

	obj->base.dma_buf = dmabuf;



	i915_gem_object_put(obj);

drivers/gpu/drm/i915/gvt/gtt.c

+19 −5
Original line number Diff line number Diff line
@@ -997,9 +997,11 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se, 
static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)

{

	struct intel_vgpu *vgpu = spt->vgpu;

	struct intel_gvt *gvt = vgpu->gvt;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	struct intel_vgpu_ppgtt_spt *s;

	struct intel_gvt_gtt_entry se, ge;

	unsigned long i;

	unsigned long gfn, i;

	int ret;



	trace_spt_change(spt->vgpu->id, "born", spt,
@@ -1007,9 +1009,10 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt) 


	if (gtt_type_is_pte_pt(spt->shadow_page.type)) {

		for_each_present_guest_entry(spt, &ge, i) {

			ret = gtt_entry_p2m(vgpu, &ge, &se);

			if (ret)

				goto fail;

			gfn = ops->get_pfn(&ge);

			if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn) ||

				gtt_entry_p2m(vgpu, &ge, &se))

				ops->set_pfn(&se, gvt->gtt.scratch_mfn);

			ppgtt_set_shadow_entry(spt, &se, i);

		}

		return 0;
@@ -1906,7 +1909,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, 
	struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;

	struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;

	unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;

	unsigned long gma;

	unsigned long gma, gfn;

	struct intel_gvt_gtt_entry e, m;

	int ret;
@@ -1925,6 +1928,16 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, 
			bytes);



	if (ops->test_present(&e)) {

		gfn = ops->get_pfn(&e);



		/* one PTE update may be issued in multiple writes and the

		 * first write may not construct a valid gfn

		 */

		if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) {

			ops->set_pfn(&m, gvt->gtt.scratch_mfn);

			goto out;

		}



		ret = gtt_entry_p2m(vgpu, &e, &m);

		if (ret) {

			gvt_vgpu_err("fail to translate guest gtt entry\n");
@@ -1939,6 +1952,7 @@ static int emulate_gtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off, 
		ops->set_pfn(&m, gvt->gtt.scratch_mfn);

	}



out:

	ggtt_set_shadow_entry(ggtt_mm, &m, g_gtt_index);

	gtt_invalidate(gvt->dev_priv);

	ggtt_set_guest_entry(ggtt_mm, &e, g_gtt_index);