Loading arch/arm/common/vic.c +16 −16 Original line number Diff line number Diff line Loading @@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } #endif /* CONFIG_PM */ static void vic_ack_irq(unsigned int irq) static void vic_ack_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); /* moreover, clear the soft-triggered, in case it was the reason */ writel(1 << irq, base + VIC_INT_SOFT_CLEAR); } static void vic_mask_irq(unsigned int irq) static void vic_mask_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); } static void vic_unmask_irq(unsigned int irq) static void vic_unmask_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE); } Loading @@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq) return NULL; } static int vic_set_wake(unsigned int irq, unsigned int on) static int vic_set_wake(struct irq_data *d, unsigned int on) { struct vic_device *v = vic_from_irq(irq); unsigned int off = irq & 31; struct vic_device *v = vic_from_irq(d->irq); unsigned int off = d->irq & 31; u32 bit = 1 << off; if (!v) Loading @@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on) static struct irq_chip vic_chip = { .name = "VIC", .ack = vic_ack_irq, .mask = vic_mask_irq, .unmask = vic_unmask_irq, .set_wake = vic_set_wake, .irq_ack = vic_ack_irq, .irq_mask = vic_mask_irq, .irq_unmask = vic_unmask_irq, .irq_set_wake = vic_set_wake, }; static void __init vic_disable(void __iomem *base) Loading Loading
arch/arm/common/vic.c +16 −16 Original line number Diff line number Diff line Loading @@ -204,26 +204,26 @@ static void __init vic_pm_register(void __iomem *base, unsigned int irq, u32 res static inline void vic_pm_register(void __iomem *base, unsigned int irq, u32 arg1) { } #endif /* CONFIG_PM */ static void vic_ack_irq(unsigned int irq) static void vic_ack_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); /* moreover, clear the soft-triggered, in case it was the reason */ writel(1 << irq, base + VIC_INT_SOFT_CLEAR); } static void vic_mask_irq(unsigned int irq) static void vic_mask_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE_CLEAR); } static void vic_unmask_irq(unsigned int irq) static void vic_unmask_irq(struct irq_data *d) { void __iomem *base = get_irq_chip_data(irq); irq &= 31; void __iomem *base = irq_data_get_irq_chip_data(d); unsigned int irq = d->irq & 31; writel(1 << irq, base + VIC_INT_ENABLE); } Loading @@ -242,10 +242,10 @@ static struct vic_device *vic_from_irq(unsigned int irq) return NULL; } static int vic_set_wake(unsigned int irq, unsigned int on) static int vic_set_wake(struct irq_data *d, unsigned int on) { struct vic_device *v = vic_from_irq(irq); unsigned int off = irq & 31; struct vic_device *v = vic_from_irq(d->irq); unsigned int off = d->irq & 31; u32 bit = 1 << off; if (!v) Loading @@ -267,10 +267,10 @@ static int vic_set_wake(unsigned int irq, unsigned int on) static struct irq_chip vic_chip = { .name = "VIC", .ack = vic_ack_irq, .mask = vic_mask_irq, .unmask = vic_unmask_irq, .set_wake = vic_set_wake, .irq_ack = vic_ack_irq, .irq_mask = vic_mask_irq, .irq_unmask = vic_unmask_irq, .irq_set_wake = vic_set_wake, }; static void __init vic_disable(void __iomem *base) Loading