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Commit f013531f authored by Phanindra Babu Pabba's avatar Phanindra Babu Pabba
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ARM: dts: msm: Add eMMC inline crypto engine node for scuba

Add Inline Crypto Engine device node and crypto
support for Embedded MultiMediaCard storage, to
support File Based Encryption for scuba target.

Change-Id: I60f8069734fe0ad193f9750c0ca05722dbf328cf
parent 7022eb80
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+26 −0
Original line number Original line Diff line number Diff line
@@ -1075,6 +1075,31 @@
		};
		};
	};
	};


	sdcc1_ice: sdcc1ice@4748000 {
		compatible = "qcom,ice";
		reg = <0x4748000 0x8000>;
		qcom,enable-ice-clk;
		clock-names = "ice_core_clk_src", "ice_core_clk",
				"bus_clk", "iface_clk";
		clocks = <&gcc GCC_SDCC1_ICE_CORE_CLK_SRC>,
			<&gcc GCC_SDCC1_ICE_CORE_CLK>,
			<&gcc GCC_SDCC1_AHB_CLK>,
			<&gcc GCC_SDCC1_APPS_CLK>;
		qcom,op-freq-hz = <300000000>, <0>, <0>, <0>;
		qcom,msm-bus,name = "sdcc_ice_noc";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_AMPSS_M0
				MSM_BUS_SLAVE_SDCC_1 0 0>,  /* No vote */
				<MSM_BUS_MASTER_AMPSS_M0
				MSM_BUS_SLAVE_SDCC_1 1000 0>;
				/* Max. bandwidth */
		qcom,bus-vector-names = "MIN",
					"MAX";
		qcom,instance-type = "sdcc";
	};

	sdhc_1: sdhci@4744000 {
	sdhc_1: sdhci@4744000 {
		compatible = "qcom,sdhci-msm-v5", "qcom,sdhci-msm-cqe";
		compatible = "qcom,sdhci-msm-v5", "qcom,sdhci-msm-cqe";
		reg = <0x4744000 0x1000>, <0x4745000 0x1000>;
		reg = <0x4744000 0x1000>, <0x4745000 0x1000>;
@@ -1083,6 +1108,7 @@
		interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
		interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
				<GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "hc_irq", "pwr_irq";
		interrupt-names = "hc_irq", "pwr_irq";
		sdhc-msm-crypto = <&sdcc1_ice>;


		qcom,bus-width = <8>;
		qcom,bus-width = <8>;
		qcom,large-address-bus;
		qcom,large-address-bus;