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Commit eff8ea8f authored by Feras Daoud's avatar Feras Daoud Committed by Saeed Mahameed
Browse files

net/mlx5: FW tracer, add hardware structures 



This change adds the infrastructure to mlx5 core fw tracer.
It introduces the following 4 new registers:
MLX5_REG_MTRC_CAP  - Used to read tracer capabilities
MLX5_REG_MTRC_CONF - Used to set tracer configurations
MLX5_REG_MTRC_STDB - Used to query tracer strings database
MLX5_REG_MTRC_CTRL - Used to control the tracer

The capability of the tracing can be checked using mcam access
register, therefore, the mcam access register interface will expose
the tracer register.

Signed-off-by: default avatarFeras Daoud <ferasda@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 31e33a5b

include/linux/mlx5/driver.h

+4 −0
Original line number Diff line number Diff line
@@ -138,6 +138,10 @@ enum { 
	MLX5_REG_HOST_ENDIANNESS = 0x7004,

	MLX5_REG_MCIA		 = 0x9014,

	MLX5_REG_MLCR		 = 0x902b,

	MLX5_REG_MTRC_CAP	 = 0x9040,

	MLX5_REG_MTRC_CONF	 = 0x9041,

	MLX5_REG_MTRC_STDB	 = 0x9042,

	MLX5_REG_MTRC_CTRL	 = 0x9043,

	MLX5_REG_MPCNT		 = 0x9051,

	MLX5_REG_MTPPS		 = 0x9053,

	MLX5_REG_MTPPSE		 = 0x9054,

include/linux/mlx5/mlx5_ifc.h

+60 −1
Original line number Diff line number Diff line
@@ -8112,7 +8112,9 @@ struct mlx5_ifc_mcam_access_reg_bits { 
	u8         mcqi[0x1];

	u8         reserved_at_1f[0x1];



	u8         regs_95_to_64[0x20];

	u8         regs_95_to_68[0x1c];

	u8         tracer_registers[0x4];



	u8         regs_63_to_32[0x20];

	u8         regs_31_to_0[0x20];

};
@@ -9187,4 +9189,61 @@ struct mlx5_ifc_create_uctx_in_bits { 
	struct mlx5_ifc_uctx_bits                     uctx;

};



struct mlx5_ifc_mtrc_string_db_param_bits {

	u8         string_db_base_address[0x20];



	u8         reserved_at_20[0x8];

	u8         string_db_size[0x18];

};



struct mlx5_ifc_mtrc_cap_bits {

	u8         trace_owner[0x1];

	u8         trace_to_memory[0x1];

	u8         reserved_at_2[0x4];

	u8         trc_ver[0x2];

	u8         reserved_at_8[0x14];

	u8         num_string_db[0x4];



	u8         first_string_trace[0x8];

	u8         num_string_trace[0x8];

	u8         reserved_at_30[0x28];



	u8         log_max_trace_buffer_size[0x8];



	u8         reserved_at_60[0x20];



	struct mlx5_ifc_mtrc_string_db_param_bits string_db_param[8];



	u8         reserved_at_280[0x180];

};



struct mlx5_ifc_mtrc_conf_bits {

	u8         reserved_at_0[0x1c];

	u8         trace_mode[0x4];

	u8         reserved_at_20[0x18];

	u8         log_trace_buffer_size[0x8];

	u8         trace_mkey[0x20];

	u8         reserved_at_60[0x3a0];

};



struct mlx5_ifc_mtrc_stdb_bits {

	u8         string_db_index[0x4];

	u8         reserved_at_4[0x4];

	u8         read_size[0x18];

	u8         start_offset[0x20];

	u8         string_db_data[0];

};



struct mlx5_ifc_mtrc_ctrl_bits {

	u8         trace_status[0x2];

	u8         reserved_at_2[0x2];

	u8         arm_event[0x1];

	u8         reserved_at_5[0xb];

	u8         modify_field_select[0x10];

	u8         reserved_at_20[0x2b];

	u8         current_timestamp52_32[0x15];

	u8         current_timestamp31_0[0x20];

	u8         reserved_at_80[0x180];

};



#endif /* MLX5_IFC_H */