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Commit ef6e8f4c authored by Roy Spliet's avatar Roy Spliet Committed by Ben Skeggs
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drm/nouveau/fb/ramgt215: Change FBVDD/Q when BIOS asks for it 



Signed-off-by: default avatarRoy Spliet <rspliet@eclipso.eu>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e0a37f85

drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/ramcfg.h

+1 −0
Original line number Diff line number Diff line
@@ -39,6 +39,7 @@ struct nvbios_ramcfg { 
	unsigned ramcfg_timing;

	unsigned ramcfg_DLLoff;

	unsigned ramcfg_RON;

	unsigned ramcfg_FBVDDQ;

	union {

		struct {

			unsigned ramcfg_00_03_01:1;

drivers/gpu/drm/nouveau/nvkm/subdev/bios/rammap.c

+1 −0
Original line number Diff line number Diff line
@@ -205,6 +205,7 @@ nvbios_rammapSp(struct nvkm_bios *bios, u32 data, 
		p->ramcfg_DLLoff   = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6;

		p->ramcfg_10_03_0f = (nvbios_rd08(bios, data + 0x03) & 0x0f) >> 0;

		p->ramcfg_10_04_01 = (nvbios_rd08(bios, data + 0x04) & 0x01) >> 0;

		p->ramcfg_FBVDDQ   = (nvbios_rd08(bios, data + 0x04) & 0x08) >> 3;

		p->ramcfg_10_05    = (nvbios_rd08(bios, data + 0x05) & 0xff) >> 0;

		p->ramcfg_10_06    = (nvbios_rd08(bios, data + 0x06) & 0xff) >> 0;

		p->ramcfg_10_07    = (nvbios_rd08(bios, data + 0x07) & 0xff) >> 0;

drivers/gpu/drm/nouveau/nvkm/subdev/fb/ramgt215.c

+18 −0
Original line number Diff line number Diff line
@@ -498,6 +498,7 @@ gt215_ram_calc(struct nvkm_ram *base, u32 freq) 
	struct nvkm_device *device = subdev->device;

	struct nvkm_bios *bios = device->bios;

	struct gt215_clk_info mclk;

	struct nvkm_gpio *gpio = device->gpio;

	struct nvkm_ram_data *next;

	u8  ver, hdr, cnt, len, strap;

	u32 data;
@@ -656,6 +657,23 @@ gt215_ram_calc(struct nvkm_ram *base, u32 freq) 
	if (device->chipset == 0xa3 && freq <= 500000)

		ram_mask(fuc, 0x100700, 0x00000006, 0x00000006);



	/* Alter FBVDD/Q, apparently must be done with PLL disabled, thus

	 * set it to bypass */

	if (nvkm_gpio_get(gpio, 0, 0x18, DCB_GPIO_UNUSED) ==

			next->bios.ramcfg_FBVDDQ) {

		data = ram_rd32(fuc, 0x004000) & 0x9;



		if (data == 0x1)

			ram_mask(fuc, 0x004000, 0x8, 0x8);

		if (data & 0x1)

			ram_mask(fuc, 0x004000, 0x1, 0x0);



		gt215_ram_gpio(fuc, 0x18, !next->bios.ramcfg_FBVDDQ);



		if (data & 0x1)

			ram_mask(fuc, 0x004000, 0x1, 0x1);

	}



	/* Fiddle with clocks */

	/* There's 4 scenario's

	 * pll->pll: first switch to a 324MHz clock, set up new PLL, switch