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Commit ef4d084f authored by Eugeni Dodonov's avatar Eugeni Dodonov Committed by Daniel Vetter
Browse files

drm/i915: add WRPLL divider programming bits 



Those are used to program the WRPLL dividers correctly for each gives
frequency.

Signed-off-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent dc04a61a

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -4191,6 +4191,10 @@ 
#define  WRPLL_PLL_SELECT_SSC			(0x01<<28)

#define  WRPLL_PLL_SELECT_NON_SCC		(0x02<<28)

#define  WRPLL_PLL_SELECT_LCPLL_2700	(0x03<<28)

/* WRPLL divider programming */

#define  WRPLL_DIVIDER_REFERENCE(x)		((x)<<0)

#define  WRPLL_DIVIDER_POST(x)			((x)<<8)

#define  WRPLL_DIVIDER_FEEDBACK(x)		((x)<<16)



/* Port clock selection */

#define PORT_CLK_SEL_A			0x46100