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Commit eeade25a authored by Ken Wang's avatar Ken Wang Committed by Alex Deucher
Browse files

drm/amdgpu: fix power distribution issue for Polaris10 XT 



Signed-off-by: default avatarKen Wang <Qingqing.Wang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 795c2109

drivers/gpu/drm/amd/amdgpu/atombios_i2c.c

+15 −0
Original line number Diff line number Diff line
@@ -156,3 +156,18 @@ u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap) 
	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;

}



void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev, u8 slave_addr, u8 line_number, u8 offset, u8 data)

{

	PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args;

	int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction);



	args.ucRegIndex = offset;

	args.lpI2CDataOut = data;

	args.ucFlag = 1;

	args.ucI2CSpeed = TARGET_HW_I2C_CLOCK;

	args.ucTransBytes = 1;

	args.ucSlaveAddr = slave_addr;

	args.ucLineNumber = line_number;



	amdgpu_atom_execute_table(adev->mode_info.atom_context, index, (uint32_t *)&args);

}

drivers/gpu/drm/amd/amdgpu/atombios_i2c.h

+2 −0
Original line number Diff line number Diff line
@@ -27,5 +27,7 @@ 
int amdgpu_atombios_i2c_xfer(struct i2c_adapter *i2c_adap,

		      struct i2c_msg *msgs, int num);

u32 amdgpu_atombios_i2c_func(struct i2c_adapter *adap);

void amdgpu_atombios_i2c_channel_trans(struct amdgpu_device* adev,

		u8 slave_addr, u8 line_number, u8 offset, u8 data);



#endif

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+5 −0
Original line number Diff line number Diff line
@@ -28,6 +28,7 @@ 
#include "vid.h"

#include "amdgpu_ucode.h"

#include "amdgpu_atombios.h"

#include "atombios_i2c.h"

#include "clearstate_vi.h"



#include "gmc/gmc_8_2_d.h"
@@ -698,6 +699,10 @@ static void gfx_v8_0_init_golden_registers(struct amdgpu_device *adev) 
						 polaris10_golden_common_all,

						 (const u32)ARRAY_SIZE(polaris10_golden_common_all));

		WREG32_SMC(ixCG_ACLK_CNTL, 0x0000001C);

		if (adev->pdev->revision == 0xc7) {

			amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1E, 0xDD);

			amdgpu_atombios_i2c_channel_trans(adev, 0x10, 0x96, 0x1F, 0xD0);

		}

		break;

	case CHIP_CARRIZO:

		amdgpu_program_register_sequence(adev,