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Commit ee0a227b authored by Chris Wilson's avatar Chris Wilson Committed by Daniel Vetter
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drm/i915: Replace WARN inside I915_READ64_2x32 with retry loop 



Since we may conceivably encounter situations where the upper part of the
64bit register changes between reads, for example when a timestamp
counter overflows, change the WARN into a retry loop.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent cbfe8fa6

drivers/gpu/drm/i915/i915_drv.h

+8 −9
Original line number Diff line number Diff line
@@ -3303,14 +3303,13 @@ int intel_freq_opcode(struct drm_i915_private *dev_priv, int val); 
#define I915_READ64(reg)	dev_priv->uncore.funcs.mmio_readq(dev_priv, (reg), true)



#define I915_READ64_2x32(lower_reg, upper_reg) ({			\

		u32 upper = I915_READ(upper_reg);			\

		u32 lower = I915_READ(lower_reg);			\

		u32 tmp = I915_READ(upper_reg);				\

		if (upper != tmp) {					\

	u32 upper, lower, tmp;						\

	tmp = I915_READ(upper_reg);					\

	do {								\

		upper = tmp;						\

		lower = I915_READ(lower_reg);				\

			WARN_ON(I915_READ(upper_reg) != upper);		\

		}							\

		tmp = I915_READ(upper_reg);				\

	} while (upper != tmp);						\

	(u64)upper << 32 | lower; })



#define POSTING_READ(reg)	(void)I915_READ_NOTRACE(reg)