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Commit ed54fcfd authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
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[ARM] 4479/1: AT91: Define new MMC register bits 



Add definitions for RDPROOF, WRPROOF and PDCFBYTE bits of the Mode
Register in the updated MMC controller found on the AT91SAM9260 and
AT91SAM9263 processors.

Signed-off-by: default avatarAndrew Victor <andrew@sanpeople.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent c06911c0

include/asm-arm/arch-at91/at91_mci.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -26,6 +26,9 @@ 
#define AT91_MCI_MR		0x04		/* Mode Register */

#define AT91_MCI_MR		0x04		/* Mode Register */

#define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */

#define		AT91_MCI_CLKDIV		(0xff  <<  0)	/* Clock Divider */

#define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */

#define		AT91_MCI_PWSDIV		(7     <<  8)	/* Power Saving Divider */

#define		AT91_MCI_RDPROOF	(1     << 11)	/* Read Proof Enable [SAM926[03] only] */

#define		AT91_MCI_WRPROOF	(1     << 12)	/* Write Proof Enable [SAM926[03] only] */

#define		AT91_MCI_PDCFBYTE	(1     << 13)	/* PDC Force Byte Transfer [SAM926[03] only] */

#define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */

#define		AT91_MCI_PDCPADV	(1     << 14)	/* PDC Padding Value */

#define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */

#define		AT91_MCI_PDCMODE	(1     << 15)	/* PDC-orientated Mode */

#define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */

#define		AT91_MCI_BLKLEN		(0xfff << 18)	/* Data Block Length */