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Commit ed1501d4 authored by Chris Wilson's avatar Chris Wilson
Browse files

drm/i915: Refactor tests for validity of RING_TAIL 



Whilst I like having the assertions clearly visible in the code, they
are quite repetitious! As we find new limits we want to incorporate into
the set of assertions, it make sense to refactor them to a common
routine.

v2: Add a guc holdout.

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170327131412.20293-1-chris@chris-wilson.co.uk


Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
parent a91fdf12

drivers/gpu/drm/i915/i915_guc_submission.c

+1 −1
Original line number Diff line number Diff line
@@ -481,7 +481,7 @@ static void guc_wq_item_append(struct i915_guc_client *client, 


	/* The GuC firmware wants the tail index in QWords, not bytes */

	tail = rq->tail;

	GEM_BUG_ON(tail & 7);

	assert_ring_tail_valid(rq->ring, rq->tail);

	tail >>= 3;

	GEM_BUG_ON(tail > WQ_RING_TAIL_MAX);

drivers/gpu/drm/i915/intel_lrc.c

+4 −8
Original line number Diff line number Diff line
@@ -326,8 +326,7 @@ static u64 execlists_update_context(struct drm_i915_gem_request *rq) 
		rq->ctx->ppgtt ?: rq->i915->mm.aliasing_ppgtt;

	u32 *reg_state = ce->lrc_reg_state;



	GEM_BUG_ON(!IS_ALIGNED(rq->tail, 8));

	GEM_BUG_ON(rq->tail >= rq->ring->size);

	assert_ring_tail_valid(rq->ring, rq->tail);

	reg_state[CTX_RING_TAIL+1] = rq->tail;



	/* True 32b PPGTT with dynamic page allocation: update PDP
@@ -1282,8 +1281,7 @@ static void reset_common_ring(struct intel_engine_cs *engine, 
	request->tail =

		intel_ring_wrap(request->ring,

				request->wa_tail - WA_TAIL_DWORDS*sizeof(u32));

	GEM_BUG_ON(!IS_ALIGNED(request->tail, 8));

	GEM_BUG_ON(request->tail >= request->ring->size);

	assert_ring_tail_valid(request->ring, request->tail);

}



static int intel_logical_ring_emit_pdps(struct drm_i915_gem_request *req)
@@ -1494,8 +1492,7 @@ static void gen8_emit_breadcrumb(struct drm_i915_gem_request *request, u32 *cs) 
	*cs++ = MI_USER_INTERRUPT;

	*cs++ = MI_NOOP;

	request->tail = intel_ring_offset(request, cs);

	GEM_BUG_ON(!IS_ALIGNED(request->tail, 8));

	GEM_BUG_ON(request->tail >= request->ring->size);

	assert_ring_tail_valid(request->ring, request->tail);



	gen8_emit_wa_tail(request, cs);

}
@@ -1523,8 +1520,7 @@ static void gen8_emit_breadcrumb_render(struct drm_i915_gem_request *request, 
	*cs++ = MI_USER_INTERRUPT;

	*cs++ = MI_NOOP;

	request->tail = intel_ring_offset(request, cs);

	GEM_BUG_ON(!IS_ALIGNED(request->tail, 8));

	GEM_BUG_ON(request->tail >= request->ring->size);

	assert_ring_tail_valid(request->ring, request->tail);



	gen8_emit_wa_tail(request, cs);

}

drivers/gpu/drm/i915/intel_ringbuffer.c

+3 −6
Original line number Diff line number Diff line
@@ -774,8 +774,7 @@ static void i9xx_submit_request(struct drm_i915_gem_request *request) 


	i915_gem_request_submit(request);



	GEM_BUG_ON(!IS_ALIGNED(request->tail, 8));

	GEM_BUG_ON(request->tail >= request->ring->size);

	assert_ring_tail_valid(request->ring, request->tail);

	I915_WRITE_TAIL(request->engine, request->tail);

}
@@ -787,8 +786,7 @@ static void i9xx_emit_breadcrumb(struct drm_i915_gem_request *req, u32 *cs) 
	*cs++ = MI_USER_INTERRUPT;



	req->tail = intel_ring_offset(req, cs);

	GEM_BUG_ON(!IS_ALIGNED(req->tail, 8));

	GEM_BUG_ON(req->tail >= req->ring->size);

	assert_ring_tail_valid(req->ring, req->tail);

}



static const int i9xx_emit_breadcrumb_sz = 4;
@@ -827,8 +825,7 @@ static void gen8_render_emit_breadcrumb(struct drm_i915_gem_request *req, 
	*cs++ = MI_NOOP;



	req->tail = intel_ring_offset(req, cs);

	GEM_BUG_ON(!IS_ALIGNED(req->tail, 8));

	GEM_BUG_ON(req->tail >= req->ring->size);

	assert_ring_tail_valid(req->ring, req->tail);

}



static const int gen8_render_emit_breadcrumb_sz = 8;

drivers/gpu/drm/i915/intel_ringbuffer.h

+11 −0
Original line number Diff line number Diff line
@@ -529,6 +529,17 @@ intel_ring_offset(const struct drm_i915_gem_request *req, void *addr) 
	return intel_ring_wrap(req->ring, offset);

}



static inline void

assert_ring_tail_valid(const struct intel_ring *ring, unsigned int tail)

{

	/* We could combine these into a single tail operation, but keeping

	 * them as seperate tests will help identify the cause should one

	 * ever fire.

	 */

	GEM_BUG_ON(!IS_ALIGNED(tail, 8));

	GEM_BUG_ON(tail >= ring->size);

}



void intel_ring_update_space(struct intel_ring *ring);



void intel_engine_init_global_seqno(struct intel_engine_cs *engine, u32 seqno);