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Commit ecf4b196 authored by Thomas Gleixner's avatar Thomas Gleixner
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powerpc: ipic: Cleanup flow type handling



The core irq_set_type() function updates the flow type when the chip
callback returns 0. So setting the type is bogus.

The new core code allows to update the type in irq_data and return
IRQ_SET_MASK_OK_NOCOPY, so the core code will not touch it, except for
setting the IRQ_LEVEL flag.

Use the proper accessors for setting the irq handlers.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent 7bf811a8
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+7 −9
Original line number Diff line number Diff line
@@ -605,7 +605,6 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
{
	struct ipic *ipic = ipic_from_irq(d->irq);
	unsigned int src = ipic_irq_to_hw(d->irq);
	struct irq_desc *desc = irq_to_desc(d->irq);
	unsigned int vold, vnew, edibit;

	if (flow_type == IRQ_TYPE_NONE)
@@ -623,17 +622,16 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
		printk(KERN_ERR "ipic: edge sense not supported on internal "
				"interrupts\n");
		return -EINVAL;

	}

	desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
	desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
	irqd_set_trigger_type(d, flow_type);
	if (flow_type & IRQ_TYPE_LEVEL_LOW)  {
		desc->status |= IRQ_LEVEL;
		desc->handle_irq = handle_level_irq;
		desc->irq_data.chip = &ipic_level_irq_chip;
		__irq_set_handler_locked(d->irq, handle_level_irq);
		d->chip = &ipic_level_irq_chip;
	} else {
		desc->handle_irq = handle_edge_irq;
		desc->irq_data.chip = &ipic_edge_irq_chip;
		__irq_set_handler_locked(d->irq, handle_edge_irq);
		d->chip = &ipic_edge_irq_chip;
	}

	/* only EXT IRQ senses are programmable on ipic
@@ -655,7 +653,7 @@ static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
	}
	if (vold != vnew)
		ipic_write(ipic->regs, IPIC_SECNR, vnew);
	return 0;
	return IRQ_SET_MASK_OK_NOCOPY;
}

/* level interrupts and edge interrupts have different ack operations */