Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ecf35a23 authored by Jeremy Linton's avatar Jeremy Linton Committed by Catalin Marinas
Browse files

arm64: PTE/PMD contiguous bit definition 



Define the bit positions in the PTE and PMD for the
contiguous bit.

Signed-off-by: default avatarJeremy Linton <jeremy.linton@arm.com>
Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
parent 2ff4439b

arch/arm64/include/asm/pgtable-hwdef.h

+9 −0
Original line number Diff line number Diff line
@@ -54,6 +54,13 @@ 
#define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)

#define SECTION_MASK		(~(SECTION_SIZE-1))



/*

 * Contiguous page definitions.

 */

#define CONT_PTES		(_AC(1, UL) << CONT_SHIFT)

/* the the numerical offset of the PTE within a range of CONT_PTES */

#define CONT_RANGE_OFFSET(addr) (((addr)>>PAGE_SHIFT)&(CONT_PTES-1))



/*

 * Hardware page table definitions.

 *
@@ -83,6 +90,7 @@ 
#define PMD_SECT_S		(_AT(pmdval_t, 3) << 8)

#define PMD_SECT_AF		(_AT(pmdval_t, 1) << 10)

#define PMD_SECT_NG		(_AT(pmdval_t, 1) << 11)

#define PMD_SECT_CONT		(_AT(pmdval_t, 1) << 52)

#define PMD_SECT_PXN		(_AT(pmdval_t, 1) << 53)

#define PMD_SECT_UXN		(_AT(pmdval_t, 1) << 54)
@@ -105,6 +113,7 @@ 
#define PTE_AF			(_AT(pteval_t, 1) << 10)	/* Access Flag */

#define PTE_NG			(_AT(pteval_t, 1) << 11)	/* nG */

#define PTE_DBM			(_AT(pteval_t, 1) << 51)	/* Dirty Bit Management */

#define PTE_CONT		(_AT(pteval_t, 1) << 52)	/* Contiguous range */

#define PTE_PXN			(_AT(pteval_t, 1) << 53)	/* Privileged XN */

#define PTE_UXN			(_AT(pteval_t, 1) << 54)	/* User XN */