Commit ec34d52e authored Feb 04, 2013 by Dongjin Kim Committed by Kukjin Kim Mar 07, 2013

ARM: dts: Fix the timing property of MSHC controller for exynos4412-odroidx



This fixes the property of dw-mshc-sdr-timing and dw-mshc-ddr-timing as per
its current binding, it only has two cells.

Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

parent e88d5ae6

arch/arm/boot/dts/exynos4412-odroidx.dts

+2 −2

Original line number	Diff line number	Diff line
		@@ -49,8 +49,8 @@
		fifo-depth = <0x80>;
		card-detect-delay = <200>;
		samsung,dw-mshc-ciu-div = <3>;
		samsung,dw-mshc-sdr-timing = <2 3 3>;
		samsung,dw-mshc-ddr-timing = <1 2 3>;
		samsung,dw-mshc-sdr-timing = <2 3>;
		samsung,dw-mshc-ddr-timing = <1 2>;

		slot@0 {
		reg = <0>;