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Commit ebc37465 authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo
Browse files

ARM: dts: imx35-pdk: Add initial device tree support 



Add support for UART, eSDHC and NAND.

Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@freescale.com>
parent 266a71b3

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -157,6 +157,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx27-phytec-phycard-s-rdk.dtb \

	imx31-bug.dtb \

	imx35-eukrea-mbimxsd35-baseboard.dtb \

	imx35-pdk.dtb \

	imx50-evk.dtb \

	imx51-apf51.dtb \

	imx51-apf51dev.dtb \

arch/arm/boot/dts/imx35-pdk.dts

0 → 100644
+67 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>

 * Copyright 2014 Freescale Semiconductor, Inc.

 *

 * The code contained herein is licensed under the GNU General Public

 * License. You may obtain a copy of the GNU General Public License

 * Version 2 or later at the following locations:

 *

 * http://www.opensource.org/licenses/gpl-license.html

 * http://www.gnu.org/copyleft/gpl.html

 */



/dts-v1/;

#include "imx35.dtsi"



/ {

	model = "Freescale i.MX35 Product Development Kit";

	compatible = "fsl,imx35-pdk", "fsl,imx35";



	memory {

		reg = <0x80000000 0x8000000>;

	};

};



&esdhc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc1>;

	status = "okay";

};



&iomuxc {

	imx35-pdk {

		pinctrl_esdhc1: esdhc1grp {

			fsl,pins = <

				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000

				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000

				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000

				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000

				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000

				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000

			>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5

				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5

				MX35_PAD_CTS1__UART1_CTS		0x1c5

				MX35_PAD_RTS1__UART1_RTS		0x1c5

			>;

		};

	};

};



&nfc {

	nand-bus-width = <16>;

	nand-ecc-mode = "hw";

	nand-on-flash-bbt;

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	fsl,uart-has-rtscts;

	status = "okay";

};