Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eba4daf0 authored by Uma Shankar's avatar Uma Shankar Committed by Jani Nikula
Browse files

drm/i915/bxt: Fix BXT DSI ULPS sequence 



Fix the Sequence to program BXT DSI Latch and ULPS.

Signed-off-by: default avatarUma Shankar <uma.shankar@intel.com>
Signed-off-by: default avatarVidya Srinivas <vidya.srinivas@intel.com>
Reviewed-by: default avatarBob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1486551058-22596-6-git-send-email-vidya.srinivas@intel.com
parent 6043801f

drivers/gpu/drm/i915/intel_dsi.c

+5 −18
Original line number Diff line number Diff line
@@ -366,32 +366,19 @@ static void bxt_dsi_device_ready(struct intel_encoder *encoder) 


	DRM_DEBUG_KMS("\n");



	/* Exit Low power state in 4 steps*/

	/* Enable MIPI PHY transparent latch */

	for_each_dsi_port(port, intel_dsi->ports) {



		/* 1. Enable MIPI PHY transparent latch */

		val = I915_READ(BXT_MIPI_PORT_CTRL(port));

		I915_WRITE(BXT_MIPI_PORT_CTRL(port), val | LP_OUTPUT_HOLD);

		usleep_range(2000, 2500);



		/* 2. Enter ULPS */

		val = I915_READ(MIPI_DEVICE_READY(port));

		val &= ~ULPS_STATE_MASK;

		val |= (ULPS_STATE_ENTER | DEVICE_READY);

		I915_WRITE(MIPI_DEVICE_READY(port), val);

		/* at least 2us - relaxed for hrtimer subsystem optimization */

		usleep_range(10, 50);



		/* 3. Exit ULPS */

		val = I915_READ(MIPI_DEVICE_READY(port));

		val &= ~ULPS_STATE_MASK;

		val |= (ULPS_STATE_EXIT | DEVICE_READY);

		I915_WRITE(MIPI_DEVICE_READY(port), val);

		usleep_range(1000, 1500);

	}



	/* Clear ULPS and set device ready */

	for_each_dsi_port(port, intel_dsi->ports) {

		val = I915_READ(MIPI_DEVICE_READY(port));

		val &= ~ULPS_STATE_MASK;

		I915_WRITE(MIPI_DEVICE_READY(port), val);

		usleep_range(2000, 2500);

		val |= DEVICE_READY;

		I915_WRITE(MIPI_DEVICE_READY(port), val);

	}