Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit eb89be05 authored by Neeraj Upadhyay's avatar Neeraj Upadhyay
Browse files

ARM: dts: msm: Update cpuss dump sizes for Lito 

Update cpuss dump size to match the one required for dump data
collection on Lito SoC.

Change-Id: I7fde7af901a555c32a1ffc2cb48811d93b299143
parent bc7ff2cc

qcom/lito.dtsi

+14 −14
Original line number Diff line number Diff line
@@ -77,7 +77,7 @@ 


			L1_I_0: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_0: l1-dcache {
@@ -86,7 +86,7 @@ 
			};



			L2_TLB_0: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};

		};
@@ -110,7 +110,7 @@ 


			L1_I_100: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_100: l1-dcache {
@@ -119,7 +119,7 @@ 
			};



			L2_TLB_100: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};

		};
@@ -143,7 +143,7 @@ 


			L1_I_200: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_200: l1-dcache {
@@ -152,7 +152,7 @@ 
			};



			L2_TLB_200: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};

		};
@@ -176,7 +176,7 @@ 


			L1_I_300: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_300: l1-dcache {
@@ -185,7 +185,7 @@ 
			};



			L2_TLB_300: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};



		};
@@ -210,7 +210,7 @@ 


			L1_I_400: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_400: l1-dcache {
@@ -219,7 +219,7 @@ 
			};



			L2_TLB_400: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};

		};
@@ -243,7 +243,7 @@ 


			L1_I_500: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x8800>;

				qcom,dump-size = <0x10800>;

			};



			L1_D_500: l1-dcache {
@@ -252,7 +252,7 @@ 
			};



			L2_TLB_500: l2-tlb {

				qcom,dump-size = <0x5000>;

				qcom,dump-size = <0x5a00>;

			};

		};
@@ -278,7 +278,7 @@ 


			L1_I_600: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

				qcom,dump-size = <0x21000>;

			};



			L1_D_600: l1-dcache {
@@ -321,7 +321,7 @@ 


			L1_I_700: l1-icache {

				compatible = "arm,arch-cache";

				qcom,dump-size = <0x11000>;

				qcom,dump-size = <0x21000>;

			};



			L1_D_700: l1-dcache {