Loading arch/arm64/boot/dts/qcom/kona.dtsi +19 −0 Original line number Original line Diff line number Diff line Loading @@ -1603,6 +1603,25 @@ }; }; }; }; qmp_aop: qcom,qmp-aop@c300000 { compatible = "qcom,qmp-mbox"; mboxes = <&ipcc_mproc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "aop_qmp"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; reg = <0xc300000 0x1000>; reg-names = "msgram"; label = "aop"; qcom,early-boot; priority = <0>; mbox-desc-offset = <0x0>; #mbox-cells = <1>; }; qcom,lpass@17300000 { qcom,lpass@17300000 { compatible = "qcom,pil-tz-generic"; compatible = "qcom,pil-tz-generic"; reg = <0x17300000 0x00100>; reg = <0x17300000 0x00100>; Loading Loading
arch/arm64/boot/dts/qcom/kona.dtsi +19 −0 Original line number Original line Diff line number Diff line Loading @@ -1603,6 +1603,25 @@ }; }; }; }; qmp_aop: qcom,qmp-aop@c300000 { compatible = "qcom,qmp-mbox"; mboxes = <&ipcc_mproc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; mbox-names = "aop_qmp"; interrupt-parent = <&ipcc_mproc>; interrupts = <IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP IRQ_TYPE_EDGE_RISING>; reg = <0xc300000 0x1000>; reg-names = "msgram"; label = "aop"; qcom,early-boot; priority = <0>; mbox-desc-offset = <0x0>; #mbox-cells = <1>; }; qcom,lpass@17300000 { qcom,lpass@17300000 { compatible = "qcom,pil-tz-generic"; compatible = "qcom,pil-tz-generic"; reg = <0x17300000 0x00100>; reg = <0x17300000 0x00100>; Loading