Merge "msm: pcie: Use local variable for manipulation" (eabcd830) · Commits · e / devices / android_kernel_fairphone_FP4

drivers/pci/controller/pci-msm.c

+8 −5

Original line number	Diff line number	Diff line
		@@ -1461,6 +1461,7 @@ static void msm_pcie_sel_debug_testcase(struct msm_pcie_dev_t *dev,
		static void __iomem *loopback_lbar_vir;
		int ret, i;
		u32 base_sel_size = 0;
		u32 wr_ofst = 0;

		switch (testcase) {
		case MSM_PCIE_OUTPUT_PCIE_INFO:
		@@ -1655,22 +1656,24 @@ static void msm_pcie_sel_debug_testcase(struct msm_pcie_dev_t *dev,
		break;
		}

		wr_ofst = wr_offset;

		PCIE_DBG_FS(dev,
		"base: %s: 0x%pK\nwr_offset: 0x%x\nwr_mask: 0x%x\nwr_value: 0x%x\n",
		dev->res[base_sel - 1].name,
		dev->res[base_sel - 1].base,
		wr_offset, wr_mask, wr_value);
		wr_ofst, wr_mask, wr_value);

		base_sel_size = resource_size(dev->res[base_sel - 1].resource);

		if (wr_offset > base_sel_size - 4 \|\|
		msm_pcie_check_align(dev, wr_offset))
		if (wr_ofst > base_sel_size - 4 \|\|
		msm_pcie_check_align(dev, wr_ofst))
		PCIE_DBG_FS(dev,
		"PCIe: RC%d: Invalid wr_offset: 0x%x. wr_offset should be no more than 0x%x\n",
		dev->rc_idx, wr_offset, base_sel_size - 4);
		dev->rc_idx, wr_ofst, base_sel_size - 4);
		else
		msm_pcie_write_reg_field(dev->res[base_sel - 1].base,
		wr_offset, wr_mask, wr_value);
		wr_ofst, wr_mask, wr_value);

		break;
		case MSM_PCIE_DUMP_PCIE_REGISTER_SPACE: