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Commit ea1d7b23 authored by Satya Rama Aditya Pinapala's avatar Satya Rama Aditya Pinapala Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add support for DSI on KONA 



This change enables DSI probe by adding panel and pin 
control nodes for Kona.

Change-Id: Ib73151b9ad2c1db5293c11858b8006f1392b2193
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
parent 3cb6025e

arch/arm64/boot/dts/qcom/kona-cdp.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -70,6 +70,20 @@ 
	};

};



&dsi_sw43404_amoled_cmd {

	qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;

	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";

	qcom,mdss-dsi-bl-min-level = <1>;

	qcom,mdss-dsi-bl-max-level = <1023>;

	qcom,mdss-brightness-max-level = <255>;

	qcom,platform-te-gpio = <&tlmm 66 0>;

	qcom,platform-reset-gpio = <&tlmm 75 0>;

};



&sde_dsi {

	qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;

};



&pm8150b_vadc {

	#address-cells = <1>;

	#size-cells = <0>;

arch/arm64/boot/dts/qcom/kona-pinctrl.dtsi

+108 −0
Original line number Diff line number Diff line
@@ -664,6 +664,114 @@ 
			};

		};



		pmx_sde: pmx_sde {

			sde_dsi_active: sde_dsi_active {

				mux {

					pins = "gpio75";

					function = "gpio";

				};



				config {

					pins = "gpio75";

					drive-strength = <8>;   /* 8 mA */

					bias-disable = <0>;   /* no pull */

				};

			};



			sde_dsi_suspend: sde_dsi_suspend {

				mux {

					pins = "gpio75";

					function = "gpio";

				};



				config {

					pins = "gpio75";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_dsi1_active: sde_dsi1_active {

				mux {

					pins = "gpio128";

					function = "gpio";

				};



				config {

					pins = "gpio128";

					drive-strength = <8>;   /* 8 mA */

					bias-disable = <0>;   /* no pull */

				};

			};



			sde_dsi1_suspend: sde_dsi1_suspend {

				mux {

					pins = "gpio128";

					function = "gpio";

				};



				config {

					pins = "gpio128";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};

		};



		pmx_sde_te {

			sde_te_active: sde_te_active {

				mux {

					pins = "gpio66";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio66";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_te_suspend: sde_te_suspend {

				mux {

					pins = "gpio66";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio66";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_te1_active: sde_te1_active {

				mux {

					pins = "gpio67";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio67";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_te1_suspend: sde_te1_suspend {

				mux {

					pins = "gpio67";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio67";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};

		};



		wsa_swr_clk_pin {

			wsa_swr_clk_sleep: wsa_swr_clk_sleep {

				mux {

arch/arm64/boot/dts/qcom/kona-sde-display.dtsi

+68 −1
Original line number Diff line number Diff line
@@ -3,6 +3,9 @@ 
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

 */



#include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"

#include <dt-bindings/clock/mdss-7nm-pll-clk.h>



&soc {

	ext_disp: qcom,msm-ext-disp {

		compatible = "qcom,msm-ext-disp";
@@ -12,6 +15,59 @@ 
		};

	};



	dsi_panel_pwr_supply: dsi_panel_pwr_supply {

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,panel-supply-entry@0 {

			reg = <0>;

			qcom,supply-name = "vddio";

			qcom,supply-min-voltage = <1800000>;

			qcom,supply-max-voltage = <1800000>;

			qcom,supply-enable-load = <62000>;

			qcom,supply-disable-load = <80>;

			qcom,supply-post-on-sleep = <20>;

		};



		qcom,panel-supply-entry@1 {

			reg = <1>;

			qcom,supply-name = "vdd";

			qcom,supply-min-voltage = <3300000>;

			qcom,supply-max-voltage = <3300000>;

			qcom,supply-enable-load = <857000>;

			qcom,supply-disable-load = <0>;

			qcom,supply-post-on-sleep = <0>;

		};

	};



	sde_dsi: qcom,dsi-display-primary {

		compatible = "qcom,dsi-display";

		label = "primary";



		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;

		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;



		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,

			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,

			 <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,

			 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;

		clock-names = "src_byte_clk0", "src_pixel_clk0",

			      "src_byte_clk1", "src_pixel_clk1";



		pinctrl-names = "panel_active", "panel_suspend";

		pinctrl-0 = <&sde_dsi_active &sde_te_active>;

		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;



		qcom,platform-te-gpio = <&tlmm 66 0>;

		qcom,panel-te-source = <0>;



		vddio-supply = <&pm8150_l14>;

		vdd-supply = <&pm8150a_l11>;



		qcom,mdp = <&mdss_mdp>;

		qcom,dsi-default-panel = <&dsi_sw43404_amoled_cmd>;

	};



	sde_wb: qcom,wb-display@0 {

		compatible = "qcom,wb-display";

		cell-index = <0>;
@@ -32,5 +88,16 @@ 
};



&mdss_mdp {

	connectors = <&sde_dp &sde_wb>;

	connectors = <&sde_dp &sde_wb &sde_dsi>;

};



&dsi_sw43404_amoled_cmd {

	qcom,mdss-dsi-display-timings {

		timing@0 {

			qcom,mdss-dsi-panel-phy-timings = [00 14 05 05 1f 1e 05

				05 03 02 04 00 12 15];

			qcom,display-topology = <2 2 1>;

			qcom,default-topology-index = <0>;

		};

	};

};

arch/arm64/boot/dts/qcom/kona-sde.dtsi

+132 −0
Original line number Diff line number Diff line
@@ -493,4 +493,136 @@ 
			qcom,iommu-dma = "disabled";

		};

	};



	mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 {

		compatible = "qcom,dsi-ctrl-hw-v2.4";

		label = "dsi-ctrl-0";

		cell-index = <0>;

		reg = <0xae94000 0x400>,

			<0xaf08000 0x4>;

		reg-names = "dsi_ctrl", "disp_cc_base";

		interrupt-parent = <&mdss_mdp>;

		interrupts = <4 0>;

		vdda-1p2-supply = <&pm8150_l9>;

		clocks = <&clock_dispcc DISP_CC_MDSS_BYTE0_CLK>,

			<&clock_dispcc DISP_CC_MDSS_BYTE0_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>,

			<&clock_dispcc DISP_CC_MDSS_PCLK0_CLK>,

			<&clock_dispcc DISP_CC_MDSS_PCLK0_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_ESC0_CLK>;

		clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",

				"pixel_clk", "pixel_clk_rcg", "esc_clk";



		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-1p2";

				qcom,supply-min-voltage = <1200000>;

				qcom,supply-max-voltage = <1200000>;

				qcom,supply-enable-load = <21800>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 {

		compatible = "qcom,dsi-ctrl-hw-v2.4";

		label = "dsi-ctrl-1";

		cell-index = <1>;

		reg = <0xae96000 0x400>,

			<0xaf08000 0x4>;

		reg-names = "dsi_ctrl", "disp_cc_base";

		interrupt-parent = <&mdss_mdp>;

		interrupts = <5 0>;

		vdda-1p2-supply = <&pm8150_l9>;

		clocks = <&clock_dispcc DISP_CC_MDSS_BYTE1_CLK>,

			<&clock_dispcc DISP_CC_MDSS_BYTE1_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_BYTE1_INTF_CLK>,

			<&clock_dispcc DISP_CC_MDSS_PCLK1_CLK>,

			<&clock_dispcc DISP_CC_MDSS_PCLK1_CLK_SRC>,

			<&clock_dispcc DISP_CC_MDSS_ESC1_CLK>;

		clock-names = "byte_clk", "byte_clk_rcg", "byte_intf_clk",

				"pixel_clk", "pixel_clk_rcg", "esc_clk";

		qcom,ctrl-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;



			qcom,ctrl-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-1p2";

				qcom,supply-min-voltage = <1200000>;

				qcom,supply-max-voltage = <1200000>;

				qcom,supply-enable-load = <21800>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	mdss_dsi_phy0: qcom,mdss_dsi_phy0@ae94400 {

		compatible = "qcom,dsi-phy-v4.1";

		label = "dsi-phy-0";

		cell-index = <0>;

		reg = <0xae94400 0x760>;

		reg-names = "dsi_phy";

		vdda-0p9-supply = <&pm8150_l5>;

		qcom,platform-strength-ctrl = [55 03

						55 03

						55 03

						55 03

						55 00];

		qcom,platform-lane-config = [00 00 0a 0a

						00 00 0a 0a

						00 00 0a 0a

						00 00 0a 0a

						00 00 8a 8a];

		qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];

		qcom,phy-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;

			qcom,phy-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-0p9";

				qcom,supply-min-voltage = <880000>;

				qcom,supply-max-voltage = <880000>;

				qcom,supply-enable-load = <36000>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



	mdss_dsi_phy1: qcom,mdss_dsi_phy1@ae96400 {

		compatible = "qcom,dsi-phy-v4.1";

		label = "dsi-phy-1";

		cell-index = <1>;

		reg = <0xae96400 0x760>;

		reg-names = "dsi_phy";

		vdda-0p9-supply = <&pm8150_l5>;

		qcom,platform-strength-ctrl = [55 03

						55 03

						55 03

						55 03

						55 00];

		qcom,platform-regulator-settings = [1d 1d 1d 1d 1d];

		qcom,platform-lane-config = [00 00 0a 0a

						00 00 0a 0a

						00 00 0a 0a

						00 00 0a 0a

						00 00 8a 8a];

		qcom,phy-supply-entries {

			#address-cells = <1>;

			#size-cells = <0>;

			qcom,phy-supply-entry@0 {

				reg = <0>;

				qcom,supply-name = "vdda-0p9";

				qcom,supply-min-voltage = <880000>;

				qcom,supply-max-voltage = <880000>;

				qcom,supply-enable-load = <36000>;

				qcom,supply-disable-load = <0>;

			};

		};

	};



};