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Commit e99df8fd authored by Anup Patel's avatar Anup Patel Committed by Florian Fainelli
Browse files

arm64: dts: Add ARM SP804 timer DT nodes for NS2 



We have four ARM SP804 dual-mode timer instances in NS2 SoC
hence this patch adds appropriate DT nodes for NS2.

Signed-off-by: default avatarAnup Patel <anup.patel@broadcom.com>
Reviewed-by: default avatarRay Jui <rjui@broadcom.com>
Reviewed-by: default avatarPramod KUMAR <pramodku@broadcom.com>
Reviewed-by: default avatarScott Branden <sbranden@broadcom.com>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent efc87767

arch/arm64/boot/dts/broadcom/ns2.dtsi

+40 −0
Original line number Diff line number Diff line
@@ -256,6 +256,46 @@ 
			      <0x65260000 0x1000>;

		};



		timer0: timer@66030000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x66030000 0x1000>;

			interrupts = <GIC_SPI 396 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&iprocslow>,

				 <&iprocslow>,

				 <&iprocslow>;

			clock-names = "timer1", "timer2", "apb_pclk";

		};



		timer1: timer@66040000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x66040000 0x1000>;

			interrupts = <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&iprocslow>,

				 <&iprocslow>,

				 <&iprocslow>;

			clock-names = "timer1", "timer2", "apb_pclk";

		};



		timer2: timer@66050000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x66050000 0x1000>;

			interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&iprocslow>,

				 <&iprocslow>,

				 <&iprocslow>;

			clock-names = "timer1", "timer2", "apb_pclk";

		};



		timer3: timer@66060000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x66060000 0x1000>;

			interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&iprocslow>,

				 <&iprocslow>,

				 <&iprocslow>;

			clock-names = "timer1", "timer2", "apb_pclk";

		};



		i2c0: i2c@66080000 {

			compatible = "brcm,iproc-i2c";

			reg = <0x66080000 0x100>;