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Commit e8c3ae02 authored by Taniya Das's avatar Taniya Das Committed by David Collins
Browse files

clk: qcom: Retrieve pre_div from freq_tbl for shared RCG 



There could be cases where a simultaneous clk_disable and clk_set_rate on
the same rcg could result in a wrong recalc rate. So for shared rcgs
get the pre_div value based on the current frequency from the frequency
table.

Change-Id: Ia5730e43965b2d0ba19da05fca47825514f98865
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent f2009579

drivers/clk/qcom/clk-rcg2.c

+14 −4
Original line number Diff line number Diff line
@@ -247,9 +247,11 @@ static unsigned long 
clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)

{

	struct clk_rcg2 *rcg = to_clk_rcg2(hw);

	const struct freq_tbl *f_curr;

	u32 cfg, hid_div, m = 0, n = 0, mode = 0, mask;



	if (rcg->enable_safe_config && !clk_hw_is_prepared(hw)) {

	if (rcg->enable_safe_config && (!clk_hw_is_prepared(hw)

				|| !clk_hw_is_enabled(hw))) {

		if (!rcg->current_freq)

			rcg->current_freq = cxo_f.freq;

		return rcg->current_freq;
@@ -269,9 +271,17 @@ clk_rcg2_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) 
		mode >>= CFG_MODE_SHIFT;

	}



	if (rcg->enable_safe_config) {

		f_curr = qcom_find_freq(rcg->freq_tbl, rcg->current_freq);

		if (!f_curr)

			return -EINVAL;



		hid_div = f_curr->pre_div;

	} else {

		mask = BIT(rcg->hid_width) - 1;

		hid_div = cfg >> CFG_SRC_DIV_SHIFT;

		hid_div &= mask;

	}



	return calc_rate(parent_rate, m, n, mode, hid_div);

}