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Commit e868d612 authored by Simon Arlott's avatar Simon Arlott Committed by Paul Mundt
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spelling fixes: arch/sh/



Spelling fixes in arch/sh/.

Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 049fa57c
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+1 −1
Original line number Diff line number Diff line
@@ -69,7 +69,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp,
	}

	switch (cmd) {
	case GIODRV_IOCSGIOSETADDR:	/* addres set */
	case GIODRV_IOCSGIOSETADDR:	/* address set */
		addr = data;
		break;

+1 −1
Original line number Diff line number Diff line
@@ -108,7 +108,7 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
static void ds1302_reset(void)
{
	unsigned long	flags;
	/* Hardware dependant reset/init */
	/* Hardware dependent reset/init */
	local_irq_save(flags);
	set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
	set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
+3 −3
Original line number Diff line number Diff line
@@ -198,12 +198,12 @@ void microdev_outb(unsigned char b, unsigned long port)
	/*
	 *	There is a board feature with the current SH4-202 MicroDev in
	 *	that the 2 byte enables (nBE0 and nBE1) are tied together (and
	 *	to the Chip Select Line (Ethernet_CS)). Due to this conectivity,
	 *	to the Chip Select Line (Ethernet_CS)). Due to this connectivity,
	 *	it is not possible to safely perform 8-bit writes to the
	 *	Ethernet registers, as 16-bits will be consumed from the Data
	 *	lines (corrupting the other byte).  Hence, this function is
	 *	written to impliment 16-bit read/modify/write for all byte-wide
	 *	acceses.
	 *	written to implement 16-bit read/modify/write for all byte-wide
	 *	accesses.
	 *
	 *	Note: there is no problem with byte READS (even or odd).
	 *
+3 −3
Original line number Diff line number Diff line
@@ -100,7 +100,7 @@ static void disable_microdev_irq(unsigned int irq)

	fpgaIrq = fpgaIrqTable[irq].fpgaIrq;

	/* disable interupts on the FPGA INTC register */
	/* disable interrupts on the FPGA INTC register */
	ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
}

@@ -125,7 +125,7 @@ static void enable_microdev_irq(unsigned int irq)
	priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
	ctrl_outl(priorities, priorityReg);

	/* enable interupts on the FPGA INTC register */
	/* enable interrupts on the FPGA INTC register */
	ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
}

@@ -152,7 +152,7 @@ extern void __init init_microdev_irq(void)
{
	int i;

		/* disable interupts on the FPGA INTC register */
		/* disable interrupts on the FPGA INTC register */
	ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);

	for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
+1 −1
Original line number Diff line number Diff line
@@ -349,7 +349,7 @@ static int __init smsc_superio_setup(void)
	SMSC_WRITE_INDEXED(0x00, 0xc7);	/* GP47 = nIOWOP */
	SMSC_WRITE_INDEXED(0x08, 0xe8);	/* GP20 = nIDE2_OE */

		/* Exit the configuraton state */
		/* Exit the configuration state */
	outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);

	return 0;
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