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Commit e8620acc authored by Elaine Zhang's avatar Elaine Zhang Committed by Heiko Stuebner
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clk: rockchip: add pclk_pmu as critical clock on rk3128 



pclk_pmu need always on, and no dts node to handle this clk,
so make it as critical clock

Signed-off-by: default avatarElaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 2bd6bf03

drivers/clk/rockchip/clk-rk3128.c

+2 −1
Original line number Diff line number Diff line
@@ -541,7 +541,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = { 
	GATE(0, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS),

	GATE(0, "pclk_mipiphy", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 0, GFLAGS),



	GATE(0, "pclk_pmu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 2, GFLAGS),

	GATE(0, "pclk_pmu", "pclk_pmu_pre", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS),

	GATE(0, "pclk_pmu_niu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 3, GFLAGS),



	/* PD_MMC */
@@ -577,6 +577,7 @@ static const char *const rk3128_critical_clocks[] __initconst = { 
	"aclk_peri",

	"hclk_peri",

	"pclk_peri",

	"pclk_pmu",

};



static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np)