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Commit e7fda6c4 authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer and time updates from Thomas Gleixner:
 "A rather large update of timers, timekeeping & co

   - Core timekeeping code is year-2038 safe now for 32bit machines.
     Now we just need to fix all in kernel users and the gazillion of
     user space interfaces which rely on timespec/timeval :)

   - Better cache layout for the timekeeping internal data structures.

   - Proper nanosecond based interfaces for in kernel users.

   - Tree wide cleanup of code which wants nanoseconds but does hoops
     and loops to convert back and forth from timespecs.  Some of it
     definitely belongs into the ugly code museum.

   - Consolidation of the timekeeping interface zoo.

   - A fast NMI safe accessor to clock monotonic for tracing.  This is a
     long standing request to support correlated user/kernel space
     traces.  With proper NTP frequency correction it's also suitable
     for correlation of traces accross separate machines.

   - Checkpoint/restart support for timerfd.

   - A few NOHZ[_FULL] improvements in the [hr]timer code.

   - Code move from kernel to kernel/time of all time* related code.

   - New clocksource/event drivers from the ARM universe.  I'm really
     impressed that despite an architected timer in the newer chips SoC
     manufacturers insist on inventing new and differently broken SoC
     specific timers.

[ Ed. "Impressed"? I don't think that word means what you think it means ]

   - Another round of code move from arch to drivers.  Looks like most
     of the legacy mess in ARM regarding timers is sorted out except for
     a few obnoxious strongholds.

   - The usual updates and fixlets all over the place"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (114 commits)
  timekeeping: Fixup typo in update_vsyscall_old definition
  clocksource: document some basic timekeeping concepts
  timekeeping: Use cached ntp_tick_length when accumulating error
  timekeeping: Rework frequency adjustments to work better w/ nohz
  timekeeping: Minor fixup for timespec64->timespec assignment
  ftrace: Provide trace clocks monotonic
  timekeeping: Provide fast and NMI safe access to CLOCK_MONOTONIC
  seqcount: Add raw_write_seqcount_latch()
  seqcount: Provide raw_read_seqcount()
  timekeeping: Use tk_read_base as argument for timekeeping_get_ns()
  timekeeping: Create struct tk_read_base and use it in struct timekeeper
  timekeeping: Restructure the timekeeper some more
  clocksource: Get rid of cycle_last
  clocksource: Move cycle_last validation to core code
  clocksource: Make delta calculation a function
  wireless: ath9k: Get rid of timespec conversions
  drm: vmwgfx: Use nsec based interfaces
  drm: i915: Use nsec based interfaces
  timekeeping: Provide ktime_get_raw()
  hangcheck-timer: Use ktime_get_ns()
  ...
parents 08d69a25 953dec21
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@@ -54,7 +54,7 @@
!Ikernel/sched/cpupri.c
!Ikernel/sched/fair.c
!Iinclude/linux/completion.h
!Ekernel/timer.c
!Ekernel/time/timer.c
     </sect1>
     <sect1><title>Wait queues and Wake events</title>
!Iinclude/linux/wait.h
@@ -63,7 +63,7 @@
     <sect1><title>High-resolution timers</title>
!Iinclude/linux/ktime.h
!Iinclude/linux/hrtimer.h
!Ekernel/hrtimer.c
!Ekernel/time/hrtimer.c
     </sect1>
     <sect1><title>Workqueues and Kevents</title>
!Ekernel/workqueue.c
+29 −0
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* Cirrus Logic CLPS711X Timer Counter

Required properties:
- compatible: Shall contain "cirrus,clps711x-timer".
- reg       : Address and length of the register set.
- interrupts: The interrupt number of the timer.
- clocks    : phandle of timer reference clock.

Note: Each timer should have an alias correctly numbered in "aliases" node.

Example:
	aliases {
		timer0 = &timer1;
		timer1 = &timer2;
	};

	timer1: timer@80000300 {
		compatible = "cirrus,ep7312-timer", "cirrus,clps711x-timer";
		reg = <0x80000300 0x4>;
		interrupts = <8>;
		clocks = <&clks 5>;
	};

	timer2: timer@80000340 {
		compatible = "cirrus,ep7312-timer", "cirrus,clps711x-timer";
		reg = <0x80000340 0x4>;
		interrupts = <9>;
		clocks = <&clks 6>;
	};
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Mediatek MT6577, MT6572 and MT6589 Timers
---------------------------------------

Required properties:
- compatible: Should be "mediatek,mt6577-timer"
- reg: Should contain location and length for timers register.
- clocks: Clocks driving the timer hardware. This list should include two
	clocks. The order is system clock and as second clock the RTC clock.

Examples:

	timer@10008000 {
		compatible = "mediatek,mt6577-timer";
		reg = <0x10008000 0x80>;
		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_LOW>;
		clocks = <&system_clk>, <&rtc_clk>;
	};
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* Renesas R-Car Compare Match Timer (CMT)

The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
inputs and programmable compare match.

Channels share hardware resources but their counter and compare match value
are independent. A particular CMT instance can implement only a subset of the
channels supported by the CMT model. Channel indices represent the hardware
position of the channel in the CMT and don't match the channel numbers in the
datasheets.

Required Properties:

  - compatible: must contain one of the following.
    - "renesas,cmt-32" for the 32-bit CMT
		(CMT0 on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
		(CMT[234] on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-48" for the 48-bit CMT
		(CMT1 on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-48-gen2" for the second generation 48-bit CMT
		(CMT[01] on r8a73a4, r8a7790 and r8a7791)

  - reg: base address and length of the registers block for the timer module.
  - interrupts: interrupt-specifier for the timer, one per channel.
  - clocks: a list of phandle + clock-specifier pairs, one for each entry
    in clock-names.
  - clock-names: must contain "fck" for the functional clock.

  - renesas,channels-mask: bitmask of the available channels.


Example: R8A7790 (R-Car H2) CMT0 node

	CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
	them channels 0 and 1 in the documentation.

	cmt0: timer@ffca0000 {
		compatible = "renesas,cmt-48-gen2";
		reg = <0 0xffca0000 0 0x1004>;
		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
			     <0 142 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
		clock-names = "fck";

		renesas,channels-mask = <0x60>;
	};
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* Renesas R-Car Multi-Function Timer Pulse Unit 2 (MTU2)

The MTU2 is a multi-purpose, multi-channel timer/counter with configurable
clock inputs and programmable compare match.

Channels share hardware resources but their counter and compare match value
are independent. The MTU2 hardware supports five channels indexed from 0 to 4.

Required Properties:

  - compatible: must contain "renesas,mtu2"

  - reg: base address and length of the registers block for the timer module.

  - interrupts: interrupt specifiers for the timer, one for each entry in
    interrupt-names.
  - interrupt-names: must contain one entry named "tgi?a" for each enabled
    channel, where "?" is the channel index expressed as one digit from "0" to
    "4".

  - clocks: a list of phandle + clock-specifier pairs, one for each entry
    in clock-names.
  - clock-names: must contain "fck" for the functional clock.


Example: R7S72100 (RZ/A1H) MTU2 node

	mtu2: timer@fcff0000 {
		compatible = "renesas,mtu2";
		reg = <0xfcff0000 0x400>;
		interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>,
			     <0 146 IRQ_TYPE_LEVEL_HIGH>,
			     <0 150 IRQ_TYPE_LEVEL_HIGH>,
			     <0 154 IRQ_TYPE_LEVEL_HIGH>,
			     <0 159 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "tgi0a", "tgi1a", "tgi2a", "tgi3a", "tgi4a";
		clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
		clock-names = "fck";
	};
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