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Commit e7fd15c1 authored by Joel Fernandes's avatar Joel Fernandes Committed by Tony Lindgren
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ARM: dts: DRA7: Add DT nodes for AES IP 



DRA7 SoC has the same AES IP as OMAP4. Add DT entries for both AES cores.

Signed-off-by: default avatarJoel Fernandes <joelf@ti.com>
Signed-off-by: default avatarLokesh Vutla <lokeshvutla@ti.com>
[t-kristo@ti.com: squashed in the change to use EDMA, squashed in
                  support for two AES cores]
Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent bac9d0b8

arch/arm/boot/dts/dra7.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -1929,6 +1929,28 @@ 
			};

		};



		aes1: aes@4b500000 {

			compatible = "ti,omap4-aes";

			ti,hwmods = "aes1";

			reg = <0x4b500000 0xa0>;

			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&edma_xbar 111 0>, <&edma_xbar 110 0>;

			dma-names = "tx", "rx";

			clocks = <&l3_iclk_div>;

			clock-names = "fck";

		};



		aes2: aes@4b700000 {

			compatible = "ti,omap4-aes";

			ti,hwmods = "aes2";

			reg = <0x4b700000 0xa0>;

			interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;

			dmas = <&edma_xbar 114 0>, <&edma_xbar 113 0>;

			dma-names = "tx", "rx";

			clocks = <&l3_iclk_div>;

			clock-names = "fck";

		};



		des: des@480a5000 {

			compatible = "ti,omap4-des";

			ti,hwmods = "des";