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Commit e7ca7f9f authored by James Bottomley's avatar James Bottomley
Browse files

Merge branch 'fixes' into misc

parents 5f0dfb7a d65c8fff

Documentation/devicetree/bindings/pinctrl/meson,pinctrl.txt

+7 −31
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== Amlogic Meson pinmux controller ==



Required properties for the root node:

 - compatible: "amlogic,meson8-pinctrl" or "amlogic,meson8b-pinctrl"

 - compatible: one of "amlogic,meson8-cbus-pinctrl"

		      "amlogic,meson8b-cbus-pinctrl"

		      "amlogic,meson8-aobus-pinctrl"

		      "amlogic,meson8b-aobus-pinctrl"

 - reg: address and size of registers controlling irq functionality



=== GPIO sub-nodes ===



The 2 power domains of the controller (regular and always-on) are

represented as sub-nodes and each of them acts as a GPIO controller.

The GPIO bank for the controller is represented as a sub-node and it acts as a

GPIO controller.



Required properties for sub-nodes are:

 - reg: should contain address and size for mux, pull-enable, pull and
@@ -18,10 +21,6 @@ Required properties for sub-nodes are: 
 - gpio-controller: identifies the node as a gpio controller

 - #gpio-cells: must be 2



Valid sub-node names are:

 - "banks" for the regular domain

 - "ao-bank" for the always-on domain



=== Other sub-nodes ===



Child nodes without the "gpio-controller" represent some desired
@@ -45,7 +44,7 @@ pinctrl-bindings.txt 
=== Example ===



	pinctrl: pinctrl@c1109880 {

		compatible = "amlogic,meson8-pinctrl";

		compatible = "amlogic,meson8-cbus-pinctrl";

		reg = <0xc1109880 0x10>;

		#address-cells = <1>;

		#size-cells = <1>;
@@ -61,15 +60,6 @@ pinctrl-bindings.txt 
			#gpio-cells = <2>;

               };



		gpio_ao: ao-bank@c1108030 {

			reg = <0xc8100014 0x4>,

			      <0xc810002c 0x4>,

			      <0xc8100024 0x8>;

			reg-names = "mux", "pull", "gpio";

			gpio-controller;

			#gpio-cells = <2>;

		};



		nand {

			mux {

				groups = "nand_io", "nand_io_ce0", "nand_io_ce1",
@@ -79,18 +69,4 @@ pinctrl-bindings.txt 
				function = "nand";

			};

		};



		uart_ao_a {

			mux {

				groups = "uart_tx_ao_a", "uart_rx_ao_a",

					 "uart_cts_ao_a", "uart_rts_ao_a";

				function = "uart_ao";

			};



			conf {

				pins = "GPIOAO_0", "GPIOAO_1",

				       "GPIOAO_2", "GPIOAO_3";

				bias-disable;

			};

		};

	};

Documentation/kernel-parameters.txt

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@@ -4077,6 +4077,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
					sector if the number is odd);

				i = IGNORE_DEVICE (don't bind to this

					device);

				j = NO_REPORT_LUNS (don't use report luns

					command, uas only);

				l = NOT_LOCKABLE (don't try to lock and

					unlock ejectable media);

				m = MAX_SECTORS_64 (don't transfer more

Documentation/usb/gadget_multi.txt

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@@ -43,7 +43,7 @@ For the gadget two work under Windows two conditions have to be met: 
First of all, Windows need to detect the gadget as an USB composite

gadget which on its own have some conditions[4].  If they are met,

Windows lets USB Generic Parent Driver[5] handle the device which then

tries to much drivers for each individual interface (sort of, don't

tries to match drivers for each individual interface (sort of, don't

get into too many details).



The good news is: you do not have to worry about most of the

Documentation/x86/protection-keys.txt

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Memory Protection Keys for Userspace (PKU aka PKEYs) is a CPU feature

which will be found on future Intel CPUs.



Memory Protection Keys provides a mechanism for enforcing page-based

protections, but without requiring modification of the page tables

when an application changes protection domains.  It works by

dedicating 4 previously ignored bits in each page table entry to a

"protection key", giving 16 possible keys.



There is also a new user-accessible register (PKRU) with two separate

bits (Access Disable and Write Disable) for each key.  Being a CPU

register, PKRU is inherently thread-local, potentially giving each

thread a different set of protections from every other thread.



There are two new instructions (RDPKRU/WRPKRU) for reading and writing

to the new register.  The feature is only available in 64-bit mode,

even though there is theoretically space in the PAE PTEs.  These

permissions are enforced on data access only and have no effect on

instruction fetches.



=========================== Config Option ===========================



This config option adds approximately 1.5kb of text. and 50 bytes of

data to the executable.  A workload which does large O_DIRECT reads

of holes in XFS files was run to exercise get_user_pages_fast().  No

performance delta was observed with the config option

enabled or disabled.

MAINTAINERS

+1 −1
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@@ -6252,8 +6252,8 @@ S: Maintained 
F:	tools/testing/selftests



KERNEL VIRTUAL MACHINE (KVM)

M:	Gleb Natapov <gleb@kernel.org>

M:	Paolo Bonzini <pbonzini@redhat.com>

M:	Radim Krčmář <rkrcmar@redhat.com>

L:	kvm@vger.kernel.org

W:	http://www.linux-kvm.org

T:	git git://git.kernel.org/pub/scm/virt/kvm/kvm.git