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Commit e75ea456 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

Merge branch 'for-arm-soc' of... 

Merge branch 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm into next/cleanup

* 'for-arm-soc' of http://ftp.arm.linux.org.uk/pub/armlinux/kernel/git-cur/linux-2.6-arm:
  ARM: fix EFM32 build breakage caused by cpu_resume_arm
  ARM: 8389/1: Add cpu_resume_arm() for firmwares that resume in ARM state
  ARM: v7 setup function should invalidate L1 cache
parents 7b38951b 2678bb9f

arch/arm/include/asm/suspend.h

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ struct sleep_save_sp { 
};



extern void cpu_resume(void);

extern void cpu_resume_arm(void);

extern int cpu_suspend(unsigned long, int (*)(unsigned long));



#endif

arch/arm/kernel/sleep.S

+14 −0
Original line number Diff line number Diff line
@@ -118,6 +118,16 @@ ENDPROC(cpu_resume_after_mmu) 


	.text

	.align



#ifdef CONFIG_MMU

	.arm

ENTRY(cpu_resume_arm)

 THUMB(	adr	r9, BSYM(1f)	)	@ Kernel is entered in ARM.

 THUMB(	bx	r9		)	@ If this is a Thumb-2 kernel,

 THUMB(	.thumb			)	@ switch to Thumb now.

 THUMB(1:			)

#endif



ENTRY(cpu_resume)

ARM_BE8(setend be)			@ ensure we are in BE mode

#ifdef CONFIG_ARM_VIRT_EXT
@@ -150,6 +160,10 @@ THUMB( mov sp, r2 ) 
THUMB(	bx	r3			)

ENDPROC(cpu_resume)



#ifdef CONFIG_MMU

ENDPROC(cpu_resume_arm)

#endif



	.align 2

_sleep_save_sp:

	.long	sleep_save_sp - .

arch/arm/mach-bcm/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -43,5 +43,5 @@ obj-$(CONFIG_ARCH_BCM_63XX) := bcm63xx.o 
ifeq ($(CONFIG_ARCH_BRCMSTB),y)

CFLAGS_platsmp-brcmstb.o	+= -march=armv7-a

obj-y				+= brcmstb.o

obj-$(CONFIG_SMP)		+= headsmp-brcmstb.o platsmp-brcmstb.o

obj-$(CONFIG_SMP)		+= platsmp-brcmstb.o

endif

arch/arm/mach-bcm/brcmstb.h

deleted100644 → 0
+0 −19
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2013-2014 Broadcom Corporation

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef __BRCMSTB_H__

#define __BRCMSTB_H__



void brcmstb_secondary_startup(void);



#endif /* __BRCMSTB_H__ */

arch/arm/mach-bcm/headsmp-brcmstb.S

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
/*

 * SMP boot code for secondary CPUs

 * Based on arch/arm/mach-tegra/headsmp.S

 *

 * Copyright (C) 2010 NVIDIA, Inc.

 * Copyright (C) 2013-2014 Broadcom Corporation

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License as

 * published by the Free Software Foundation version 2.

 *

 * This program is distributed "as is" WITHOUT ANY WARRANTY of any

 * kind, whether express or implied; without even the implied warranty

 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <asm/assembler.h>

#include <linux/linkage.h>

#include <linux/init.h>



        .section ".text.head", "ax"



ENTRY(brcmstb_secondary_startup)

        /*

         * Ensure CPU is in a sane state by disabling all IRQs and switching

         * into SVC mode.

         */

        setmode	PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0



        bl      v7_invalidate_l1

        b       secondary_startup

ENDPROC(brcmstb_secondary_startup)