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Commit e75c73ad authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 FPU updates from Ingo Molnar:
 "This tree contains two main changes:

   - The big FPU code rewrite: wide reaching cleanups and reorganization
     that pulls all the FPU code together into a clean base in
     arch/x86/fpu/.

     The resulting code is leaner and faster, and much easier to
     understand.  This enables future work to further simplify the FPU
     code (such as removing lazy FPU restores).

     By its nature these changes have a substantial regression risk: FPU
     code related bugs are long lived, because races are often subtle
     and bugs mask as user-space failures that are difficult to track
     back to kernel side backs.  I'm aware of no unfixed (or even
     suspected) FPU related regression so far.

   - MPX support rework/fixes.  As this is still not a released CPU
     feature, there were some buglets in the code - should be much more
     robust now (Dave Hansen)"

* 'x86-fpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (250 commits)
  x86/fpu: Fix double-increment in setup_xstate_features()
  x86/mpx: Allow 32-bit binaries on 64-bit kernels again
  x86/mpx: Do not count MPX VMAs as neighbors when unmapping
  x86/mpx: Rewrite the unmap code
  x86/mpx: Support 32-bit binaries on 64-bit kernels
  x86/mpx: Use 32-bit-only cmpxchg() for 32-bit apps
  x86/mpx: Introduce new 'directory entry' to 'addr' helper function
  x86/mpx: Add temporary variable to reduce masking
  x86: Make is_64bit_mm() widely available
  x86/mpx: Trace allocation of new bounds tables
  x86/mpx: Trace the attempts to find bounds tables
  x86/mpx: Trace entry to bounds exception paths
  x86/mpx: Trace #BR exceptions
  x86/mpx: Introduce a boot-time disable flag
  x86/mpx: Restrict the mmap() size check to bounds tables
  x86/mpx: Remove redundant MPX_BNDCFG_ADDR_MASK
  x86/mpx: Clean up the code by not passing a task pointer around when unnecessary
  x86/mpx: Use the new get_xsave_field_ptr()API
  x86/fpu/xstate: Wrap get_xsave_addr() to make it safer
  x86/fpu/xstate: Fix up bad get_xsave_addr() assumptions
  ...
parents cfe3eceb a8424003

Documentation/kernel-parameters.txt

+4 −0
Original line number Diff line number Diff line
@@ -937,6 +937,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
			Enable debug messages at boot time.  See

			Documentation/dynamic-debug-howto.txt for details.



	nompx		[X86] Disables Intel Memory Protection Extensions.

			See Documentation/x86/intel_mpx.txt for more

			information about the feature.



	eagerfpu=	[X86]

			on	enable eager fpu restore

			off	disable eager fpu restore

Documentation/preempt-locking.txt

+1 −1
Original line number Diff line number Diff line
@@ -48,7 +48,7 @@ preemption must be disabled around such regions. 


Note, some FPU functions are already explicitly preempt safe.  For example,

kernel_fpu_begin and kernel_fpu_end will disable and enable preemption.

However, math_state_restore must be called with preemption disabled.

However, fpu__restore() must be called with preemption disabled.





RULE #3: Lock acquire and release must be performed by same task

arch/x86/Kconfig.debug

+12 −0
Original line number Diff line number Diff line
@@ -332,4 +332,16 @@ config X86_DEBUG_STATIC_CPU_HAS 


	  If unsure, say N.



config X86_DEBUG_FPU

	bool "Debug the x86 FPU code"

	depends on DEBUG_KERNEL

	default y

	---help---

	  If this option is enabled then there will be extra sanity

	  checks and (boot time) debug printouts added to the kernel.

	  This debugging adds some small amount of runtime overhead

	  to the kernel.



	  If unsure, say N.



endmenu

arch/x86/crypto/aesni-intel_glue.c

+1 −1
Original line number Diff line number Diff line
@@ -32,7 +32,7 @@ 
#include <crypto/lrw.h>

#include <crypto/xts.h>

#include <asm/cpu_device_id.h>

#include <asm/i387.h>

#include <asm/fpu/api.h>

#include <asm/crypto/aes.h>

#include <crypto/ablk_helper.h>

#include <crypto/scatterwalk.h>

arch/x86/crypto/camellia_aesni_avx2_glue.c

+4 −6
Original line number Diff line number Diff line
@@ -19,8 +19,7 @@ 
#include <crypto/ctr.h>

#include <crypto/lrw.h>

#include <crypto/xts.h>

#include <asm/xcr.h>

#include <asm/xsave.h>

#include <asm/fpu/api.h>

#include <asm/crypto/camellia.h>

#include <asm/crypto/glue_helper.h>
@@ -561,16 +560,15 @@ static struct crypto_alg cmll_algs[10] = { { 


static int __init camellia_aesni_init(void)

{

	u64 xcr0;

	const char *feature_name;



	if (!cpu_has_avx2 || !cpu_has_avx || !cpu_has_aes || !cpu_has_osxsave) {

		pr_info("AVX2 or AES-NI instructions are not detected.\n");

		return -ENODEV;

	}



	xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);

	if ((xcr0 & (XSTATE_SSE | XSTATE_YMM)) != (XSTATE_SSE | XSTATE_YMM)) {

		pr_info("AVX2 detected but unusable.\n");

	if (!cpu_has_xfeatures(XSTATE_SSE | XSTATE_YMM, &feature_name)) {

		pr_info("CPU feature '%s' is not supported.\n", feature_name);

		return -ENODEV;

	}