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Commit e6cebc72 authored by Heiko Stübner's avatar Heiko Stübner Committed by Heiko Stuebner
Browse files

clk: rockchip: use general clock flag when registering pll 



Add the general flags the pll list already contains to the clock init,
so that needed clock flags can be used for plls.

Signed-off-by: default avatarHeiko Stübner <heiko@sntech.de>
parent 4f4e0491

drivers/clk/rockchip/clk-pll.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -837,7 +837,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, 
		u8 num_parents, int con_offset, int grf_lock_offset,

		u8 num_parents, int con_offset, int grf_lock_offset,

		int lock_shift, int mode_offset, int mode_shift,

		int lock_shift, int mode_offset, int mode_shift,

		struct rockchip_pll_rate_table *rate_table,

		struct rockchip_pll_rate_table *rate_table,

		u8 clk_pll_flags)

		unsigned long flags, u8 clk_pll_flags)

{

{

	const char *pll_parents[3];

	const char *pll_parents[3];

	struct clk_init_data init;

	struct clk_init_data init;
@@ -892,7 +892,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, 
	init.name = pll_name;

	init.name = pll_name;





	/* keep all plls untouched for now */

	/* keep all plls untouched for now */

	init.flags = CLK_IGNORE_UNUSED;

	init.flags = flags | CLK_IGNORE_UNUSED;





	init.parent_names = &parent_names[0];

	init.parent_names = &parent_names[0];

	init.num_parents = 1;

	init.num_parents = 1;

drivers/clk/rockchip/clk.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -385,7 +385,7 @@ void __init rockchip_clk_register_plls(struct rockchip_clk_provider *ctx, 
				list->con_offset, grf_lock_offset,

				list->con_offset, grf_lock_offset,

				list->lock_shift, list->mode_offset,

				list->lock_shift, list->mode_offset,

				list->mode_shift, list->rate_table,

				list->mode_shift, list->rate_table,

				list->pll_flags);

				list->flags, list->pll_flags);

		if (IS_ERR(clk)) {

		if (IS_ERR(clk)) {

			pr_err("%s: failed to register clock %s\n", __func__,

			pr_err("%s: failed to register clock %s\n", __func__,

				list->name);

				list->name);

drivers/clk/rockchip/clk.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -238,7 +238,7 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, 
		u8 num_parents, int con_offset, int grf_lock_offset,

		u8 num_parents, int con_offset, int grf_lock_offset,

		int lock_shift, int mode_offset, int mode_shift,

		int lock_shift, int mode_offset, int mode_shift,

		struct rockchip_pll_rate_table *rate_table,

		struct rockchip_pll_rate_table *rate_table,

		u8 clk_pll_flags);

		unsigned long flags, u8 clk_pll_flags);





struct rockchip_cpuclk_clksel {

struct rockchip_cpuclk_clksel {

	int reg;

	int reg;