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Commit e602bc86 authored by Bhaumik Bhatt's avatar Bhaumik Bhatt
Browse files

msm: pcie: remove explicit control over L1ss timeout feature 



PCIe bus driver should not explicitly enable/disable L1ss
timeout feature. Leave the full control to client.

Change-Id: Id26772cdad2d469e3855173bac3d061e7ec4bdf8
Signed-off-by: default avatarBhaumik Bhatt <bbhatt@codeaurora.org>
parent 2d98cfef

drivers/pci/controller/pci-msm.c

+0 −9
Original line number Diff line number Diff line
@@ -767,7 +767,6 @@ struct msm_pcie_dev_t { 
	void *ipc_log_dump;

	bool use_19p2mhz_aux_clk;

	bool use_pinctrl;

	bool enable_l1ss_timeout;

	struct pinctrl *pinctrl;

	struct pinctrl_state *pins_default;

	struct pinctrl_state *pins_sleep;
@@ -6899,8 +6898,6 @@ static void __msm_pcie_l1ss_timeout_enable(struct msm_pcie_dev_t *pcie_dev) 


	msm_pcie_write_mask(pcie_dev->parf +

			PCIE20_PARF_DEBUG_INT_EN, 0, BIT(0));



	pcie_dev->enable_l1ss_timeout = true;

}



/* Suspend the PCIe link */
@@ -6926,9 +6923,6 @@ static int msm_pcie_pm_suspend(struct pci_dev *dev, 
		return ret;

	}



	if (pcie_dev->enable_l1ss_timeout)

		__msm_pcie_l1ss_timeout_disable(pcie_dev);



	if (dev && !(options & MSM_PCIE_CONFIG_NO_CFG_RESTORE)

		&& msm_pcie_confirm_linkup(pcie_dev, true, true,

			pcie_dev->conf)) {
@@ -7080,9 +7074,6 @@ static int msm_pcie_pm_resume(struct pci_dev *dev, 
			pcie_dev->rc_idx);

	}



	if (pcie_dev->enable_l1ss_timeout)

		__msm_pcie_l1ss_timeout_enable(pcie_dev);



	PCIE_DBG(pcie_dev, "RC%d: exit\n", pcie_dev->rc_idx);



	return ret;