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Commit e512448f authored by Kumar Gala's avatar Kumar Gala
Browse files

ARM: dts: qcom: Add SATA support on IPQ8064/AP148 



Add SATA PHY and SATA AHCI controller nodes to device tree to enable
generic ahci support on the IPQ8064/AP148 board.

Signed-off-by: default avatarKumar Gala <galak@codeaurora.org>
parent aabff7bf

arch/arm/boot/dts/qcom-ipq8064-ap148.dts

+8 −0
Original line number Diff line number Diff line
@@ -81,5 +81,13 @@ 
				};

			};

		};



		sata-phy@1b400000 {

			status = "ok";

		};



		sata@29000000 {

			status = "ok";

		};

	};

};

arch/arm/boot/dts/qcom-ipq8064.dtsi

+33 −0
Original line number Diff line number Diff line
@@ -234,6 +234,39 @@ 
			};

		};



		sata_phy: sata-phy@1b400000 {

			compatible = "qcom,ipq806x-sata-phy";

			reg = <0x1b400000 0x200>;



			clocks = <&gcc SATA_PHY_CFG_CLK>;

			clock-names = "cfg";



			#phy-cells = <0>;

			status = "disabled";

		};



		sata@29000000 {

			compatible = "qcom,ipq806x-ahci", "generic-ahci";

			reg = <0x29000000 0x180>;



			interrupts = <0 209 0x0>;



			clocks = <&gcc SFAB_SATA_S_H_CLK>,

				 <&gcc SATA_H_CLK>,

				 <&gcc SATA_A_CLK>,

				 <&gcc SATA_RXOOB_CLK>,

				 <&gcc SATA_PMALIVE_CLK>;

			clock-names = "slave_face", "iface", "core",

					"rxoob", "pmalive";



			assigned-clocks = <&gcc SATA_RXOOB_CLK>, <&gcc SATA_PMALIVE_CLK>;

			assigned-clock-rates = <100000000>, <100000000>;



			phys = <&sata_phy>;

			phy-names = "sata-phy";

			status = "disabled";

		};



		qcom,ssbi@500000 {

			compatible = "qcom,ssbi";

			reg = <0x00500000 0x1000>;