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Commit e4ec6c12 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add debugcc clock node for Bengal"

parents 3dc58893 cbab8111

bindings/clock/qcom,debugcc.txt

+2 −1
Original line number Diff line number Diff line
@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding 
----------------------------------------------------------



Required properties :

- compatible: Shall contain "qcom,kona-debugcc" or "qcom,lito-debugcc".

- compatible: Shall contain "qcom,kona-debugcc", "qcom,lito-debugcc"

		or "qcom,bengal-debugcc".

- qcom,gcc: phandle to the GCC device node.

- qcom,videocc: phandle to the Video CC device node.

- qcom,camcc: phandle to the Camera CC device node.

qcom/bengal-rumi.dtsi

+5 −0
Original line number Diff line number Diff line
@@ -146,3 +146,8 @@ 
	#clock-cells = <1>;

	#reset-cells = <1>;

};



&debugcc {

	compatible = "qcom,dummycc";

	clock-output-names = "debugcc_clocks";

};

qcom/bengal.dtsi

+22 −0
Original line number Diff line number Diff line
@@ -1192,6 +1192,28 @@ 
		#reset-cells = <1>;

	};



	mccc_debug: syscon@447d200 {

		compatible = "syscon";

		reg = <0x447d200 0x100>;

	};



	cpucc_debug: syscon@f11101c {

		compatible = "syscon";

		reg = <0xf11101c 0x4>;

	};



	debugcc: qcom,cc-debug {

		compatible = "qcom,bengal-debugcc";

		qcom,gcc = <&gcc>;

		qcom,dispcc = <&dispcc>;

		qcom,gpucc = <&gpucc>;

		qcom,mccc = <&mccc_debug>;

		qcom,cpucc = <&cpucc_debug>;

		clock-names = "xo_clk_src";

		clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;

		#clock-cells = <1>;

	};



	tcsr_mutex_block: syscon@00340000 {

		compatible = "syscon";

		reg = <0x340000 0x20000>;