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Commit e4b01fda authored Apr 12, 2016 by Srinivas Kandagatla Committed by Andy Gross Apr 20, 2016

ARM: dts: apq8064: add gsbi7 i2c support



This patch adds support to gsbi7 i2c which is used in some of the new
boards.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

parent 12861674

arch/arm/boot/dts/qcom-apq8064-pins.dtsi

+25 −0

Original line number	Diff line number	Diff line
		@@ -219,4 +219,29 @@
		function = "gsbi7";
		};
		};

		i2c7_pins: i2c7 {
		mux {
		pins = "gpio84", "gpio85";
		function = "gsbi7";
		};

		pinconf {
		pins = "gpio84", "gpio85";
		drive-strength = <16>;
		bias-disable;
		};
		};

		i2c7_pins_sleep: i2c7_pins_sleep {
		mux {
		pins = "gpio84", "gpio85";
		function = "gpio";
		};
		pinconf {
		pins = "gpio84", "gpio85";
		drive-strength = <2>;
		bias-disable = <0>;
		};
		};
		};

arch/arm/boot/dts/qcom-apq8064.dtsi

+13 −0

Original line number	Diff line number	Diff line
		@@ -511,6 +511,19 @@
		clock-names = "core", "iface";
		status = "disabled";
		};

		gsbi7_i2c: i2c@16680000 {
		compatible = "qcom,i2c-qup-v1.1.1";
		pinctrl-0 = <&i2c7_pins>;
		pinctrl-1 = <&i2c7_pins_sleep>;
		pinctrl-names = "default", "sleep";
		reg = <0x16680000 0x1000>;
		interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
		clocks = <&gcc GSBI7_QUP_CLK>,
		<&gcc GSBI7_H_CLK>;
		clock-names = "core", "iface";
		status = "disabled";
		};
		};

		rng@1a500000 {