Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e46fc90e authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux into fixes

ARM: pxa: fixes for v4.3

These fixes are mainly regression fixes triggered by irq changes,
common clock framework introduction and sound side-effect of
other platforms.

* tag 'pxa-fixes-v4.3' of https://github.com/rjarzmik/linux

:
  ARM: pxa: balloon3: Fix build error
  ARM: pxa: ssp: Fix build error by removing originally incorrect DT binding
  ARM: pxa: fix DFI bus lockups on startup

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents b8ba826f 385877c0
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -502,7 +502,7 @@ static void balloon3_irq_handler(unsigned int __irq, struct irq_desc *desc)
					balloon3_irq_enabled;
	do {
		struct irq_data *d = irq_desc_get_irq_data(desc);
		struct irq_chip *chip = irq_data_get_chip(d);
		struct irq_chip *chip = irq_desc_get_chip(desc);
		unsigned int irq;

		/* clear useless edge notification */
+7 −0
Original line number Diff line number Diff line
@@ -43,6 +43,13 @@
 * 0xf6200000..0xf6201000
 */

/*
 * DFI Bus for NAND, PXA3xx only
 */
#define NAND_PHYS		0x43100000
#define NAND_VIRT		IOMEM(0xf6300000)
#define NAND_SIZE		0x00100000

/*
 * Internal Memory Controller (PXA27x and later)
 */
+20 −1
Original line number Diff line number Diff line
@@ -47,6 +47,13 @@ extern void __init pxa_dt_irq_init(int (*fn)(struct irq_data *, unsigned int));
#define ISRAM_START	0x5c000000
#define ISRAM_SIZE	SZ_256K

/*
 * NAND NFC: DFI bus arbitration subset
 */
#define NDCR			(*(volatile u32 __iomem*)(NAND_VIRT + 0))
#define NDCR_ND_ARB_EN		(1 << 12)
#define NDCR_ND_ARB_CNTL	(1 << 19)

static void __iomem *sram;
static unsigned long wakeup_src;

@@ -362,7 +369,12 @@ static struct map_desc pxa3xx_io_desc[] __initdata = {
		.pfn		= __phys_to_pfn(PXA3XX_SMEMC_BASE),
		.length		= SMEMC_SIZE,
		.type		= MT_DEVICE
	}
	}, {
		.virtual	= (unsigned long)NAND_VIRT,
		.pfn		= __phys_to_pfn(NAND_PHYS),
		.length		= NAND_SIZE,
		.type		= MT_DEVICE
	},
};

void __init pxa3xx_map_io(void)
@@ -419,6 +431,13 @@ static int __init pxa3xx_init(void)
		 */
		ASCR &= ~(ASCR_RDH | ASCR_D1S | ASCR_D2S | ASCR_D3S);

		/*
		 * Disable DFI bus arbitration, to prevent a system bus lock if
		 * somebody disables the NAND clock (unused clock) while this
		 * bit remains set.
		 */
		NDCR = (NDCR & ~NDCR_ND_ARB_EN) | NDCR_ND_ARB_CNTL;

		if ((ret = pxa_init_dma(IRQ_DMA, 32)))
			return ret;

+0 −1
Original line number Diff line number Diff line
@@ -107,7 +107,6 @@ static const struct of_device_id pxa_ssp_of_ids[] = {
	{ .compatible = "mvrl,pxa168-ssp",	.data = (void *) PXA168_SSP },
	{ .compatible = "mrvl,pxa910-ssp",	.data = (void *) PXA910_SSP },
	{ .compatible = "mrvl,ce4100-ssp",	.data = (void *) CE4100_SSP },
	{ .compatible = "mrvl,lpss-ssp",	.data = (void *) LPSS_SSP },
	{ },
};
MODULE_DEVICE_TABLE(of, pxa_ssp_of_ids);