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Commit e3b3121f authored by Alexander Sergeyev's avatar Alexander Sergeyev Committed by Thomas Gleixner
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x86/speculation: Remove Skylake C2 from Speculation Control microcode blacklist 



In accordance with Intel's microcode revision guidance from March 6 MCU
rev 0xc2 is cleared on both Skylake H/S and Skylake Xeon E3 processors
that share CPUID 506E3.

Signed-off-by: default avatarAlexander Sergeyev <sergeev917@gmail.com>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Jia Zhang <qianyue.zj@alibaba-inc.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kyle Huey <me@kylehuey.com>
Cc: David Woodhouse <dwmw@amazon.co.uk>
Link: https://lkml.kernel.org/r/20180313193856.GA8580@localhost.localdomain
parent af1d830b

arch/x86/kernel/cpu/intel.c

+1 −2
Original line number Diff line number Diff line
@@ -105,7 +105,7 @@ static void probe_xeon_phi_r3mwait(struct cpuinfo_x86 *c) 
/*

 * Early microcode releases for the Spectre v2 mitigation were broken.

 * Information taken from;

 * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/01/microcode-update-guidance.pdf

 * - https://newsroom.intel.com/wp-content/uploads/sites/11/2018/03/microcode-update-guidance.pdf

 * - https://kb.vmware.com/s/article/52345

 * - Microcode revisions observed in the wild

 * - Release note from 20180108 microcode release
@@ -123,7 +123,6 @@ static const struct sku_microcode spectre_bad_microcodes[] = { 
	{ INTEL_FAM6_KABYLAKE_MOBILE,	0x09,	0x80 },

	{ INTEL_FAM6_SKYLAKE_X,		0x03,	0x0100013e },

	{ INTEL_FAM6_SKYLAKE_X,		0x04,	0x0200003c },

	{ INTEL_FAM6_SKYLAKE_DESKTOP,	0x03,	0xc2 },

	{ INTEL_FAM6_BROADWELL_CORE,	0x04,	0x28 },

	{ INTEL_FAM6_BROADWELL_GT3E,	0x01,	0x1b },

	{ INTEL_FAM6_BROADWELL_XEON_D,	0x02,	0x14 },