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Commit e375eb21 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "soc: qcom: dcc_v2: Add virtualization support for 32bit devices"

parents a18d6173 d61e260c

drivers/soc/qcom/dcc_v2.c

+27 −4
Original line number Diff line number Diff line
@@ -157,6 +157,28 @@ static int dcc_sram_writel(struct dcc_drvdata *drvdata, 
	return 0;

}



static void dcc_sram_memset(const struct device *dev, void __iomem *dst,

			    int c, size_t count)

{

	u64 qc = (u8)c;



	qc |= qc << 8;

	qc |= qc << 16;



	if (!count || !IS_ALIGNED((unsigned long)dst, 4)

	    || !IS_ALIGNED((unsigned long)count, 4)) {

		dev_err(dev,

			"Target address or size not aligned with 4 bytes\n");

		return;

	}



	while (count >= 4) {

		__raw_writel_no_log(qc, dst);

		dst += 4;

		count -= 4;

	}

}



static bool dcc_ready(struct dcc_drvdata *drvdata)

{

	uint32_t val;
@@ -528,7 +550,7 @@ static int __dcc_ll_cfg(struct dcc_drvdata *drvdata, int curr_list) 
	return 0;

overstep:

	ret = -EINVAL;

	memset_io(drvdata->ram_base, 0, drvdata->ram_size);

	dcc_sram_memset(drvdata->dev, drvdata->ram_base, 0, drvdata->ram_size);

	dev_err(drvdata->dev, "DCC SRAM oversteps, 0x%x (0x%x)\n",

		sram_offset, drvdata->ram_size);

err:
@@ -604,7 +626,8 @@ static int dcc_enable(struct dcc_drvdata *drvdata) 
	mutex_lock(&drvdata->mutex);



	if (!is_dcc_enabled(drvdata)) {

		memset_io(drvdata->ram_base, 0xDE, drvdata->ram_size);

		dcc_sram_memset(drvdata->dev, drvdata->ram_base, 0xDE,

			drvdata->ram_size);

	}



	for (list = 0; list < DCC_MAX_LINK_LIST; list++) {
@@ -680,7 +703,7 @@ static void dcc_disable(struct dcc_drvdata *drvdata) 
		dcc_writel(drvdata, 0, DCC_LL_LOCK(curr_list));

		drvdata->enable[curr_list] = false;

	}

	memset_io(drvdata->ram_base, 0, drvdata->ram_size);

	dcc_sram_memset(drvdata->dev, drvdata->ram_base, 0, drvdata->ram_size);

	drvdata->ram_cfg = 0;

	drvdata->ram_start = 0;

	mutex_unlock(&drvdata->mutex);
@@ -1748,7 +1771,7 @@ static int dcc_probe(struct platform_device *pdev) 
		drvdata->nr_config[i] = 0;

	}



	memset_io(drvdata->ram_base, 0, drvdata->ram_size);

	dcc_sram_memset(drvdata->dev, drvdata->ram_base, 0, drvdata->ram_size);



	drvdata->curr_list = DCC_INVALID_LINK_LIST;