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Commit e30eef71 authored by Laxminath Kasam's avatar Laxminath Kasam
Browse files

soc: swr-mstr: Update class-H port params 



Update sampling interval for class-H as per HW spec
and hstart/hstop bit fields in swr master register
since master fields are not same as slave fields
for this setting as defined in HW register document.

Change-Id: Iefb5bb83bb8984ee964f405f53ab6f8f0ba47f75
Signed-off-by: default avatarLaxminath Kasam <lkasam@codeaurora.org>
parent 408ba7c7

soc/swr-mstr-ctrl.c

+1 −1
Original line number Diff line number Diff line
@@ -924,7 +924,7 @@ static void swrm_copy_data_port_config(struct swr_master *master, u8 bank) 
		if (mport->hstart != SWR_INVALID_PARAM

				&& mport->hstop != SWR_INVALID_PARAM) {

			reg[len] = SWRM_DP_PORT_HCTRL_BANK(i + 1, bank);

			hparams = (mport->hstart << 4) | mport->hstop;

			hparams = (mport->hstop << 4) | mport->hstart;

			val[len++] = hparams;

		}

		if (mport->blk_pack_mode != SWR_INVALID_PARAM) {

soc/swrm_port_config.h

+2 −2
Original line number Diff line number Diff line
@@ -34,7 +34,7 @@ struct port_params wsa_frame_superset[SWR_MSTR_PORT_LEN] = { 


struct port_params rx_frame_params[SWR_MSTR_PORT_LEN] = {

	{3,  0,  0,  0xFF, 0xFF, 1,    0xFF, 0xFF, 1},

	{31, 0,  0,  3,    6,    7,    0,    0xFF, 0},

	{63, 0,  0,  3,    6,    7,    0,    0xFF, 0},

	{31, 11, 11, 0xFF, 0xFF, 4,    1,    0xFF, 0},

	{3,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 1,    0},

	{0,  0,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0,    0},
@@ -42,7 +42,7 @@ struct port_params rx_frame_params[SWR_MSTR_PORT_LEN] = { 


struct port_params rx_frame_params_dsd[SWR_MSTR_PORT_LEN] = {

	{3,  0,  0,  0xFF, 0xFF, 1,    0xFF, 0xFF, 1},

	{31, 0,  0,  3,    6,    7,    0,    0xFF, 0},

	{63, 0,  0,  3,    6,    7,    0,    0xFF, 0},

	{31, 11, 11, 0xFF, 0xFF, 4,    1,    0xFF, 0},

	{7,  9,  0,  0xFF, 0xFF, 0xFF, 0xFF, 1,    0},

	{3,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 3,    0},