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Commit e2fcf74f authored by Paul Mundt's avatar Paul Mundt
Browse files

sh: nommu: use 32-bit phys mode. 



The nommu code has regressed somewhat in that 29BIT gets set for the
SH-2/2A configs regardless of the fact that they are really 32BIT sans
MMU or PMB. This does a bit of tidying to get nommu properly selecting
32BIT as it was before.

Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent e96ce8eb

arch/sh/Kconfig

+1 −0
Original line number Original line Diff line number Diff line
@@ -193,6 +193,7 @@ config CPU_SH2 
config CPU_SH2A

config CPU_SH2A

	bool

	bool

	select CPU_SH2

	select CPU_SH2

	select UNCACHED_MAPPING





config CPU_SH3

config CPU_SH3

	bool

	bool

arch/sh/include/asm/addrspace.h

+4 −4
Original line number Original line Diff line number Diff line
@@ -44,10 +44,10 @@ 
/*

/*

 * These will never work in 32-bit, don't even bother.

 * These will never work in 32-bit, don't even bother.

 */

 */

#define P1SEGADDR(a)	__futile_remapping_attempt

#define P1SEGADDR(a)	({ (void)(a); BUG(); NULL; })

#define P2SEGADDR(a)	__futile_remapping_attempt

#define P2SEGADDR(a)	({ (void)(a); BUG(); NULL; })

#define P3SEGADDR(a)	__futile_remapping_attempt

#define P3SEGADDR(a)	({ (void)(a); BUG(); NULL; })

#define P4SEGADDR(a)	__futile_remapping_attempt

#define P4SEGADDR(a)	({ (void)(a); BUG(); NULL; })

#endif

#endif

#endif /* P1SEG */

#endif /* P1SEG */

arch/sh/mm/Kconfig

+1 −1
Original line number Original line Diff line number Diff line
@@ -79,7 +79,7 @@ config 29BIT 




config 32BIT

config 32BIT

	bool

	bool

	default y if CPU_SH5

	default y if CPU_SH5 || !MMU





config PMB

config PMB

	bool "Support 32-bit physical addressing through PMB"

	bool "Support 32-bit physical addressing through PMB"

arch/sh/mm/consistent.c

+7 −8
Original line number Original line Diff line number Diff line
@@ -79,21 +79,20 @@ void dma_generic_free_coherent(struct device *dev, size_t size, 
void dma_cache_sync(struct device *dev, void *vaddr, size_t size,

void dma_cache_sync(struct device *dev, void *vaddr, size_t size,

		    enum dma_data_direction direction)

		    enum dma_data_direction direction)

{

{

#if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB)

	void *addr;

	void *p1addr = vaddr;



#else

	addr = __in_29bit_mode() ?

	void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);

	       (void *)P1SEGADDR((unsigned long)vaddr) : vaddr;

#endif





	switch (direction) {

	switch (direction) {

	case DMA_FROM_DEVICE:		/* invalidate only */

	case DMA_FROM_DEVICE:		/* invalidate only */

		__flush_invalidate_region(p1addr, size);

		__flush_invalidate_region(addr, size);

		break;

		break;

	case DMA_TO_DEVICE:		/* writeback only */

	case DMA_TO_DEVICE:		/* writeback only */

		__flush_wback_region(p1addr, size);

		__flush_wback_region(addr, size);

		break;

		break;

	case DMA_BIDIRECTIONAL:		/* writeback and invalidate */

	case DMA_BIDIRECTIONAL:		/* writeback and invalidate */

		__flush_purge_region(p1addr, size);

		__flush_purge_region(addr, size);

		break;

		break;

	default:

	default:

		BUG();

		BUG();

arch/sh/mm/uncached.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -28,7 +28,7 @@ EXPORT_SYMBOL(virt_addr_uncached); 




void __init uncached_init(void)

void __init uncached_init(void)

{

{

#ifdef CONFIG_29BIT

#if defined(CONFIG_29BIT) || !defined(CONFIG_MMU)

	uncached_start = P2SEG;

	uncached_start = P2SEG;

#else

#else

	uncached_start = memory_end;

	uncached_start = memory_end;