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Commit e2fa8b9d authored by Vivek Aknurwar's avatar Vivek Aknurwar Committed by Gerrit - the friendly Code Review server
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clk: qcom: clk-alpha-pll: Remove reconfiguration of PLLs 



Remove reconfiguration of PLLs as configuration is expected
to be one time that is during probe.

Change-Id: I90f8ed553016ab32786beae0873424579ead564d
Signed-off-by: default avatarVivek Aknurwar <viveka@codeaurora.org>
parent 9553787b

drivers/clk/qcom/clk-alpha-pll.c

+0 −20
Original line number Diff line number Diff line
@@ -885,7 +885,6 @@ void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
	/* Place the PLL in STANDBY mode */

	regmap_update_bits(regmap, PLL_MODE(pll),

				 PLL_RESET_N, PLL_RESET_N);

	pll->inited = true;

}



static int clk_zonda_pll_enable(struct clk_hw *hw)
@@ -906,11 +905,6 @@ static int clk_zonda_pll_enable(struct clk_hw *hw) 
		return wait_for_pll_enable_active(pll);

	}



	if (unlikely(!pll->inited)) {

		clk_zonda_pll_configure(pll, pll->clkr.regmap,

						pll->config);

	}



	/* Get the PLL out of bypass mode */

	ret = regmap_update_bits(pll->clkr.regmap, PLL_MODE(pll),

						PLL_BYPASSNL, PLL_BYPASSNL);
@@ -1496,14 +1490,6 @@ static int lucid_pll_is_enabled(struct clk_alpha_pll *pll, 
void clk_lucid_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap,

				const struct alpha_pll_config *config)

{

	/*

	 * Disable the PLL if it's already been initialized. Not doing so might

	 * lead to the PLL running with the old frequency configuration.

	 */

	if (pll->inited) {

		regmap_update_bits(regmap, PLL_MODE(pll),

						PLL_RESET_N, 0);

	}

	if (config->l)

		regmap_write(regmap, PLL_L_VAL(pll), config->l);
@@ -1566,7 +1552,6 @@ void clk_lucid_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, 
	/* Place the PLL in STANDBY mode */

	regmap_update_bits(regmap, PLL_MODE(pll),

				 PLL_RESET_N, PLL_RESET_N);

	pll->inited = true;

}



static int alpha_pll_lucid_enable(struct clk_hw *hw)
@@ -1587,11 +1572,6 @@ static int alpha_pll_lucid_enable(struct clk_hw *hw) 
		return wait_for_pll_enable_active(pll);

	}



	if (unlikely(!pll->inited)) {

		clk_lucid_pll_configure(pll, pll->clkr.regmap,

						pll->config);

	}



	/* Set operation mode to RUN */

	regmap_write(pll->clkr.regmap, PLL_OPMODE(pll), PLL_OPMODE_RUN);

drivers/clk/qcom/clk-alpha-pll.h

+0 −2
Original line number Diff line number Diff line
@@ -49,7 +49,6 @@ struct pll_vco { 
/**

 * struct clk_alpha_pll - phase locked loop (PLL)

 * @offset: base address of registers

 * @inited: flag that's set when the PLL is initialized

 * @vco_table: array of VCO settings

 * @regs: alpha pll register map (see @clk_alpha_pll_regs)

 * @clkr: regmap clock handle
@@ -58,7 +57,6 @@ struct clk_alpha_pll { 
	u32 offset;

	const u8 *regs;

	struct alpha_pll_config *config;

	bool inited;

	const struct pll_vco *vco_table;

	size_t num_vco;

#define SUPPORTS_OFFLINE_REQ	BIT(0)