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Commit e2a4e78c authored by Alexandre Courbot's avatar Alexandre Courbot Committed by Ben Skeggs
Browse files

drm/nouveau/bar: add noncached ioremap property 



Some BARs (like GK20A's) do not support being ioremapped write-combined.
Add a boolean property to the BAR structure and handle that case in the
Nouveau BO implementation.

Signed-off-by: default avatarAlexandre Courbot <acourbot@nvidia.com>
parent 8ba9ff11

drivers/gpu/drm/nouveau/core/include/subdev/bar.h

+3 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ struct nouveau_bar { 
		    u32 flags, struct nouveau_vma *);

	void (*unmap)(struct nouveau_bar *, struct nouveau_vma *);

	void (*flush)(struct nouveau_bar *);



	/* whether the BAR supports to be ioremapped WC or should be uncached */

	bool iomap_uncached;

};



static inline struct nouveau_bar *

drivers/gpu/drm/nouveau/nouveau_bo.c

+12 −5
Original line number Diff line number Diff line
@@ -500,18 +500,25 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, 
		man->default_caching = TTM_PL_FLAG_CACHED;

		break;

	case TTM_PL_VRAM:

		man->flags = TTM_MEMTYPE_FLAG_FIXED |

			     TTM_MEMTYPE_FLAG_MAPPABLE;

		man->available_caching = TTM_PL_FLAG_UNCACHED |

					 TTM_PL_FLAG_WC;

		man->default_caching = TTM_PL_FLAG_WC;



		if (nv_device(drm->device)->card_type >= NV_50) {

			/* Some BARs do not support being ioremapped WC */

			if (nouveau_bar(drm->device)->iomap_uncached) {

				man->available_caching = TTM_PL_FLAG_UNCACHED;

				man->default_caching = TTM_PL_FLAG_UNCACHED;

			}



			man->func = &nouveau_vram_manager;

			man->io_reserve_fastpath = false;

			man->use_io_reserve_lru = true;

		} else {

			man->func = &ttm_bo_manager_func;

		}

		man->flags = TTM_MEMTYPE_FLAG_FIXED |

			     TTM_MEMTYPE_FLAG_MAPPABLE;

		man->available_caching = TTM_PL_FLAG_UNCACHED |

					 TTM_PL_FLAG_WC;

		man->default_caching = TTM_PL_FLAG_WC;

		break;

	case TTM_PL_TT:

		if (nv_device(drm->device)->card_type >= NV_50)