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Commit e264ebf4 authored by Johannes Thumshirn's avatar Johannes Thumshirn Committed by Greg Kroah-Hartman
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tty: serial: Add driver for MEN's 16z135 High Speed UART. 



Add driver for MEN's 16z135 High Speed UART.

The 16z135 is a memory mapped UART Core on an MCB FPGA and has 1024 byte
deep FIFO buffers for the RX and TX path. It also has configurable FIFO
fill level IRQs and data copied to and from the hardware has to be
acknowledged.

Signed-off-by: default avatarJohannes Thumshirn <johannes.thumshirn@men.de>
Reviewed-by: default avatarAlan Cox <gnomes@lxorguk.ukuu.org.uk>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent d9bb3fb1

drivers/tty/serial/Kconfig

+10 −0
Original line number Original line Diff line number Diff line
@@ -1509,6 +1509,16 @@ config SERIAL_ST_ASC_CONSOLE 
	depends on SERIAL_ST_ASC=y

	depends on SERIAL_ST_ASC=y

	select SERIAL_CORE_CONSOLE

	select SERIAL_CORE_CONSOLE





config SERIAL_MEN_Z135

	tristate "MEN 16z135 Support"

	depends on MCB

	help

	  Say yes here to enable support for the MEN 16z135 High Speed UART IP-Core

	  on a MCB carrier.



	  This driver can also be build as a module. If so, the module will be called

	  men_z135_uart.ko



endmenu

endmenu





endif # TTY
 
endif # TTY

drivers/tty/serial/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -87,3 +87,4 @@ obj-$(CONFIG_SERIAL_EFM32_UART) += efm32-uart.o 
obj-$(CONFIG_SERIAL_ARC)	+= arc_uart.o

obj-$(CONFIG_SERIAL_ARC)	+= arc_uart.o

obj-$(CONFIG_SERIAL_RP2)	+= rp2.o

obj-$(CONFIG_SERIAL_RP2)	+= rp2.o

obj-$(CONFIG_SERIAL_FSL_LPUART)	+= fsl_lpuart.o

obj-$(CONFIG_SERIAL_FSL_LPUART)	+= fsl_lpuart.o

obj-$(CONFIG_SERIAL_MEN_Z135)	+= men_z135_uart.o

drivers/tty/serial/men_z135_uart.c

0 → 100644
+866 −0

File added.

Preview size limit exceeded, changes collapsed.

include/uapi/linux/serial_core.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -238,4 +238,7 @@ 
/* Tilera TILE-Gx UART */

/* Tilera TILE-Gx UART */

#define PORT_TILEGX	106

#define PORT_TILEGX	106





/* MEN 16z135 UART */

#define PORT_MEN_Z135	107



#endif /* _UAPILINUX_SERIAL_CORE_H */
 
#endif /* _UAPILINUX_SERIAL_CORE_H */