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Commit e251f809 authored by Mohammed Mirza Mandayappurath Manzoor's avatar Mohammed Mirza Mandayappurath Manzoor
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msm: kgsl: Limits Management support for A650



Changes to support Limits Management feature for A650.

Change-Id: I314489fe70ddfc5ac71e2c3c8dcbe24e78e71699
Signed-off-by: default avatarMohammed Mirza Mandayappurath Manzoor <mmandaya@codeaurora.org>
parent 58c65b3e
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+1 −1
Original line number Diff line number Diff line
@@ -3524,7 +3524,7 @@ static void adreno_power_stats(struct kgsl_device *device,
		if (gpudev->read_throttling_counters) {
			adj = gpudev->read_throttling_counters(adreno_dev);
			if (adj < 0 && -adj > gpu_busy)
				adj = -gpu_busy;
				adj = 0;

			gpu_busy += adj;
		}
+7 −1
Original line number Diff line number Diff line
@@ -1102,13 +1102,19 @@ static int a6xx_soft_reset(struct adreno_device *adreno_dev)
	return 0;
}

/* Number of throttling counters for A6xx */
#define A6XX_GMU_THROTTLE_COUNTERS 3

static int64_t a6xx_read_throttling_counters(struct adreno_device *adreno_dev)
{
	int i;
	int64_t adj = -1;
	uint32_t counts[ADRENO_GPMU_THROTTLE_COUNTERS];
	uint32_t counts[A6XX_GMU_THROTTLE_COUNTERS];
	struct adreno_busy_data *busy = &adreno_dev->busy_data;

	if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM))
		return 0;

	for (i = 0; i < ARRAY_SIZE(counts); i++) {
		if (!adreno_dev->gpmu_throttle_counters[i])
			counts[i] = 0;
+24 −21
Original line number Diff line number Diff line
@@ -1351,41 +1351,44 @@ static int a6xx_gmu_rpmh_gpu_pwrctrl(struct kgsl_device *device,
	return ret;
}

static int a640_throttling_counters[ADRENO_GPMU_THROTTLE_COUNTERS] = {
	0x11, 0x15, 0x19
};
static int _setup_throttling_counter(struct adreno_device *adreno_dev,
						int countable, u32 *offset)
{
	if (*offset)
		return 0;

	return adreno_perfcounter_get(adreno_dev,
			KGSL_PERFCOUNTER_GROUP_GPMU_PWR,
			countable, offset, NULL,
			PERFCOUNTER_FLAG_KERNEL);
}

static void _setup_throttling_counters(struct adreno_device *adreno_dev)
{
	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);
	struct gmu_device *gmu = KGSL_GMU_DEVICE(device);
	int i, ret;

	for (i = 0; i < ARRAY_SIZE(a640_throttling_counters); i++) {
		adreno_dev->busy_data.throttle_cycles[i] = 0;
	int ret;

		if (!a640_throttling_counters[i])
			continue;
		if (adreno_dev->gpmu_throttle_counters[i])
			continue;
	ret = _setup_throttling_counter(adreno_dev, 0x10,
				&adreno_dev->gpmu_throttle_counters[0]);
	ret |= _setup_throttling_counter(adreno_dev, 0x15,
				&adreno_dev->gpmu_throttle_counters[1]);
	ret |= _setup_throttling_counter(adreno_dev, 0x19,
				&adreno_dev->gpmu_throttle_counters[2]);

		ret = adreno_perfcounter_get(adreno_dev,
				KGSL_PERFCOUNTER_GROUP_GPMU_PWR,
				a640_throttling_counters[i],
				&adreno_dev->gpmu_throttle_counters[i],
				NULL,
				PERFCOUNTER_FLAG_KERNEL);
	if (ret)
		dev_err_once(&gmu->pdev->dev,
				"Unable to get counter for LM: GPMU_PWR %d\n",
				a640_throttling_counters[i]);
	}
			"Could not get all the throttling counters for LM\n");

}

void a6xx_gmu_enable_lm(struct kgsl_device *device)
{
	struct adreno_device *adreno_dev = ADRENO_DEVICE(device);

	memset(adreno_dev->busy_data.throttle_cycles, 0,
		sizeof(adreno_dev->busy_data.throttle_cycles));

	if (!ADRENO_FEATURE(adreno_dev, ADRENO_LM) ||
			!test_bit(ADRENO_LM_CTRL, &adreno_dev->pwrctrl_flag))
		return;
+1 −1
Original line number Diff line number Diff line
@@ -1216,7 +1216,7 @@ TRACE_EVENT(kgsl_clock_throttling,
		__entry->crc_less50pct = crc_less50pct;
		__entry->adj = adj;
	),
	TP_printk("idle_10=%d crc_50=%d crc_more50=%d crc_less50=%d adj=%llx",
	TP_printk("idle_10=%d crc_50=%d crc_more50=%d crc_less50=%d adj=%lld",
		__entry->idle_10pct, __entry->crc_50pct, __entry->crc_more50pct,
		__entry->crc_less50pct, __entry->adj
	)